IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Volume 2, Issue 3
Displaying 1-7 of 7 articles from this issue
LETTER
  • Takahiro Yamashita, Tetsuya Fujimoto, Koichiro Ishibashi
    2005 Volume 2 Issue 3 Pages 64-69
    Published: 2005
    Released on J-STAGE: February 10, 2005
    JOURNAL FREE ACCESS
    The concept of Power Valve is presented. It consists of power switch transistors and control circuits, which give variable impedance to the power supply. The circuit controls the internal power supply voltage of logic circuits and reduces the voltage swing of signals. An experiment using a 130-nm test chip showed a 36.0% operating power reduction for a 16-bit multiplier at 50MHz. The Power Valve can be designed using logic transistors, with the same leakage current to the circuit which have IO transistor switch.
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  • Ying-Han Pang, Andrew Teoh B. J., David Ngo C. L.
    2005 Volume 2 Issue 3 Pages 70-75
    Published: 2005
    Released on J-STAGE: February 10, 2005
    JOURNAL FREE ACCESS
    This paper presents an approach to boost the performance of pseudo Zernike moments in face recognition. This approach is a hybrid of a kernel trick, discriminant function and pseudo Zernike moments (PZM), namely as Kernel-based Fisher Pseudo Zernike Moments (KFPZM). KFPZM maps the moment-based features into a high dimensional feature space via kernel function for disclosing the underlying variables which carry significant information about the image. Then, it performs discriminant analysis onto the mapped features to enhance the discrimination power via Fisher's Linear Discriminant (FLD). Experimental results show that the proposed method outperforms the sole PZM and the integrated FLD with PZM methods, achieving recognition rate of 98.11% and 93.03% in the face databases with facial expression variations and illumination variations, respectively.
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  • Takahide Oya, Alexandre Schmid, Tetsuya Asai, Yusuf Leblebici, Yoshihi ...
    2005 Volume 2 Issue 3 Pages 76-80
    Published: 2005
    Released on J-STAGE: February 10, 2005
    JOURNAL FREE ACCESS
    A clustered neural network, in which neuronal information is represented by a cluster (population of neurons), rather than a single neuron, is a possible solution to construct fault-tolerant single-electron circuits. We designed single-electron circuits based on a clustered neural network that performs differential enhancement where differences between the cluster's outputs receiving various magnitudes of inputs are enhanced after the processing. Simulation results showed that the degradation of the performance of the clustered single-electron neural network was significantly lower than that of a non-clustered network, which indicates that this approach is one possible way to construct fault-tolerant computing systems on nanodevices.
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  • Meena Mishra, R. Muralidharan, Harsh, S.S. Islam, Mukunda B. Das
    2005 Volume 2 Issue 3 Pages 81-85
    Published: 2005
    Released on J-STAGE: February 10, 2005
    JOURNAL FREE ACCESS
    In this work we have extended the analytical model on noise, by taking into account the effect of the depletion region that extends into the gate to drain spacing. The model utilizes the charge-control model based on analytical functions that relate 2-D electron gas concentration and the Fermi level. The effects of this high field extension region on the noise performance of the device have been investigated. Using the proposed model, the noise characteristics of two HEMTs are analytically calculated and compared with the measured data. It is observed that the contribution of the extended depletion region to the overall device noise is rather significant and it should not be ignored. The theoretical predictions based on the model are found to be in good agreement with the measured noise data.
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  • Satoshi Mikumo, Yukio Yamamoto
    2005 Volume 2 Issue 3 Pages 86-90
    Published: 2005
    Released on J-STAGE: February 10, 2005
    JOURNAL FREE ACCESS
    It is noticed that drain reactance of a MESFET is significantly changed by laser irradiation, and a novel optically tunable filter is proposed. One MESFET works not only as a negative resistance, but as a tuning element. Tuning range of 104MHz is obtained in X-band by optical tuning.
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  • Bogdan J. Falkowski, Shixing Yan
    2005 Volume 2 Issue 3 Pages 91-96
    Published: 2005
    Released on J-STAGE: February 10, 2005
    JOURNAL FREE ACCESS
    In this article, a fixed sign Walsh hardware structure is introduced. Sign Walsh transform is a nonlinear transform that converts binary/ternary vectors into spectral domain and is invertible. The approach used here is based on fixed butterfly diagrams that can be easily implemented in hardware using Look-Up Table cascades.
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  • Tsuyoshi Funaki, Juan C. Balda, Jeremy Junghans, Anuwat Jangwanitlert, ...
    2005 Volume 2 Issue 3 Pages 97-102
    Published: 2005
    Released on J-STAGE: February 10, 2005
    JOURNAL FREE ACCESS
    This paper reports on SiC devices operating in a dc-dc buck converter under extremely high ambient temperatures. To this end, the authors packaged SiC JFET and Schottky diodes in thermally stable packages and built a high-temperature inductor. The converter was tested at ambient temperatures up to 400°C. Although the conduction loss of the SiC JFET increases slightly with increasing temperatures, the SiC JFET and Schottky diode continue normal operation because their switching characteristics show minimal change with temperature. This work further demonstrates the suitability of the SiC devices for high-temperature power converter applications.
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