Aiming at the characteristics of low observation accuracy and high chattering of traditional sliding mode observers (SMO), a new SMO is proposed to reduce chattering and improve accuracy. In PMSM vector control, PI control has the problems of poor anti-disturbance ability and speed pulsation, while the traditional sliding mode control (SMC) has the problem of serious chattering, Therefore, on this basis, an SMC based on the new reaching law is designed, and the simulation is carried out in Matlab/Simulink. The simulation results show that the improved SMO has better performance and stronger stability than the traditional SMO. At the same time, compared with the traditional SMC and PI control, the SMC based on the new reaching law can make it respond well when the motor target speed changes suddenly, and effectively improve the problem of traditional SMC chattering, The control accuracy and steady-state error of the PMSM system are improved.

With the continuous progress of complementary metal-oxide-semiconductor (CMOS) technology, the size of memory is constantly reduced, which greatly increases the probability of the chip being interfered by radiation particles in the space environment. The traditional latch is no longer suitable for the space radiation environment. In this paper, a Radiation-hardened Polarity design Latch (RHPDL) circuit is proposed. The internal storage nodes of the cell are surrounded by full NMOS transistor or full PMOS transistor, which reduces the number of sensitive nodes and improves the circuit stability, making the circuit not only resistant to single node upset (SNU), but also resistant to double nodes upset (DNU). A fast data path is used between the input and output of the RHPDL cell to reduce the delay of data transmission. Compared with: T-latch, ST, DICE, TPDICE, RH, FERST, HSMUF, CLCT, and RFC, RHPDL improves the transmission speed of 8.3×, 11.86×, 17.68×, 14.13×, 1.09×, 15.11×, 1.4×, 15.85×, and 2.66×, respectively, at the cost of smaller area and power consumption. RHPDL with its fast transmission speed and strong robustness can work well in space radiation environment.

A slot antenna array backed by substrate integrated waveguide (SIW) cavity with high gain, wideband and low sidelobe levels (SLLs) is proposed in this letter. Four 2×2 slots antenna elements based on SIW cavity are used as the radiation structure. A broadband SIW corporate-feed network is equipped on the bottom layer to feed antenna array. Due to the broadband characteristics of antenna element and feed network, antenna array with wide band is obtained. Then, through the dislocation distribution of antenna elements, the SLLs of antenna array can get greatly reduced. A prototype has been fabricated using standard PCB process, and measured for verification. As for the measurement results, the impedance bandwidth below -10dB is from 18.2GHz to 21.7GHz (17.5%). The maximum gain is 17.4dBi at 20.5GHz. Most importantly, the SLLs of both E- and H-plane are all lower than -15dB in the working band.

In this letter, we numerically investigate noise suppression using self-phase-modulation (SPM) in transmission optical fiber and degenerate phase-sensitive optical amplifier (PSA). It is clarified that the optimum fiber input signal power for SPM and phase shift for amplitude noise suppression of 10Gbit/s binary-phase-shift keyed (BPSK) signals. Then, 10-Gbit/s BPSK signal transmission on multi-relay systems is evaluated. When the fiber input optical power is 5mW, the signal-to-noise ratio (SNR) of PSA output is larger than 20dB on 200-relays while SNR of the conventional PSA output is 15dB after 63-relays.

With aggressive scaling and multi-bit storage technology, reliability issues of 3D NAND flash memory are increasingly serious. Flash memory reliable storage time is limited by retention errors. Refresh has been an effective approach to extend storage time by rewriting the data. The critical issue is that it brings additional read and write operations, seriously degrades system performance. In this paper, a novel adaptive-refresh scheme is proposed to reduce refresh count by exploiting the page endurance variance in 3D TLC NAND flash memory. Experimental results show that the scheme can significantly reduce refresh count.

A new method of electronic code division multiple access (ECDMA) for passive optical network (PON) applications is investigated. An ultra-wideband (UWB) decoder is proposed to make available spectral amplitude-coding (SAC), as an alternative to direct sequence (DS). Code modulation waveforms implemented in multi-Gchip/s transversal filters allow the evaluation of impulsive responses of the PON structure. Impairments that impact the transmission of spectral users and thus the correct decoding of SAC signals are analyzed. The signal-to-interference ratio (SIR) is derived assuming that simultaneous users are structured as shot noise pulse-trains. It is seen that the scheme improves interference rejection over previous proposals. Photonic system simulation shows the viability of the electronic processing.

This paper presents a low-cost digital temperature sensor for radio frequency identification (RFID). The proposed sensor utilizes the leakage channel current ratio of different transistors with exponential temperature dependence, which results in ultra-low-power consumption and compact size. Thanks to a dual-differential scheme, it can operate without any extra assistance from a voltage regulator or accurate clock generator. The sensor is fabricated in a standard 55nm CMOS process, and measurement results show that the proposed design achieves an inaccuracy of +0.8/-0.75°C between -20 and 80°C while occupying a silicon area of only 5700µm². Beneficial from the low total capacitance, the power consumption is 280nW, and the conversion time is 37ms.

STT-RAM with high storage density, near-zero leakage energy and CMOS compatibility is regarded as a replacement for SRAM to build large-sized cache, which can effectively alleviate the “memory wall” and improve computing power of IoT terminals. The state-of-the-art Near-Side Prefetch Throttling (NST) oriented to SRAM cache can effectively hide the access latency of off-chip memory. However, it also shows some inadaptability to the long write latency and high write energy of STT-RAM cache. The NST algorithm can not timely alleviate the cache congestion caused by STT-RAM long write latency, moreover, if the STT-RAM cache is congested, adjusting the prefetch distance is invalid to improve the prefetch timeliness. In response to the above problems, this paper novelly proposes a periodic and real-time complementary prefetch algorithm called ENCP for STT-RAM cache. Experiments show that, compared to the best-performed STREAM prefetcher, ENCP can reduce the write energy of STT-RAM cache by 8.3% on average and 23% the most and improve the CPU IPC performance by 0.46% on average and 3.1% the most. And the ENCP has better performance and lower dynamic energy compared with NST with almost the same hardware overhead.

An ultra-symmetric dual-differential power divider based on the low loss CPW and transformer for the distributed active transformer (DAT) based power amplifiers (PA) has been introduced in this Letter. Two millimeter-wave PAs with different power dividers are compared. Experimental results show that the PA2 with the proposed power divider achieves 18dBm saturated output power (P_sat) at 84GHz, which exceeds that of the PA1 with the typical dual-differential power divider by 1.35dB. The power gain and power-added efficiency (PAE) of PA2 are 24.4dB and 12.63%, respectively. The PA2 occupies a die area of 0.48mm²

With the increasing energy-efficiency requirements for the edge computing platforms, the Instruction Set Architecture (ISA) design and precision tuning techniques highlight the possibility of improving the efficiency of dedicated operations. RISC-V as an open-source instruction set shows excellent application potential. On the other hand, the modular ISA design brings elegant design ideas, and designers can pay more attention to the collaborative design of essential ISA and software libraries. To support the design of efficient precision tuned applications, this paper presents some novel architecture and software co-design based on integer and fixed-point computations. Based on a collection of RISC-V instruction custom designs for a fixed-point mathematics library, we propose an optimal decision-making methodology for the customized ISA design space exploration to optimize some dedicated algorithms.

A dual frequency shared-aperture antenna array with grating lobe suppression in millimeter wave (mmW) band is investigated in this letter. It consists of a patch antenna working at 2.34GHz with the fundamental TM₁₀ mode and a slotted substrate integrated waveguide (SIW) cavity-backed antenna array working at 28.5GHz with the element excited in TE₄₄₀ cavity mode. The ground of mmW slot array antenna is employed as the radiation patch in microwave band, so high aperture reuse efficiency can be realized. By using a staggered distribution technique, the serious grating lobe of the high-order mode SIW antenna array with large element spacing can be greatly suppressed. A prototype is fabricated and the measurement grating lobe levels are lower than -18.5dB at 28.5GHz. The ratio of two antennas operating frequency reaches 12.1:1. The measured channel isolation between the two parts reaches -45dB at 2.35GHz and -35dB at 28.5GHz, respectively.

In recent years, millimeter and terahertz waves have attracted significant attention owing to their potential applications in high-speed wireless communication. However, such waves are susceptible to being scattered from surfaces of surrounding objects because their wavelengths are short and sensitive to even minimal roughness. Therefore, using an electromagnetic wave scattering theory based on the stochastic integral, millimeter-wave scattering distributions from minimally rough surfaces such as stones were investigated in simulations and experiments. Finally, millimeter-wave scattering measurements were compared to experimental and simulation results.