A bufferless LC oscillator can potentially offer an attractive solution for low-power, high-speed clock distribution due to the absence of repeaters on the clock distribution line and utilization of LC resonance. However, conventional bufferless LC oscillators suffer from a fundamental tradeoff between the frequency and power consumption due to their high-frequency sensitivity. In this paper, we have introduced a low-frequency sensitivity bufferless LC oscillator that is directly connected to a 10-mm on-chip clock distribution line in the TSMC 0.18-µm 1-Poly 6-Metal CMOS technology. The core area of the LC oscillator is only 270 × 280 µm2. The measurement results show that a 2.8-GHz oscillation frequency, 3.3-mA current consumption, and −112.8 dBc/Hz phase noise at 1 MHz offset can be achieved.
On the basis of the classical Quatro-10T structure, this paper proposes a novel radiation-hardened SRAM cell with the bulk silicon process read-write separation mode. At the circuit level, the gate isolation mode of double-ended writing and single-ended reading is adopted, which greatly improves the read static noise margin whilst guaranteeing the writing speed. Moreover, the use of single-ended reading lines reduces the switching power consumption of memory cells (the main part of dynamic power consumption), and stacked PMOS transistors are used to ensure the same driving capacity and area size at the layout level. Given the introduction of source isolation technology, the 3-D TCAD mixed-mode simulation results corroborate that the proposed RHBQ (Radiation Hardened Based on Quatro-10T) SRAM cell has a greatly more efficient single event upset immunity than the classical Quatro-10T cell.
A novel single layer, single capacitive probe-compensation fed wideband patch antenna is presented and investigated. The antenna consists of a rectangular patch and two identical U-shaped parasitic patches. The two U-shaped patches are incorporated around the radiating edges and non-radiating edges of the rectangular patch. For maintaining a relatively small antenna size, the length and width of this rectangular patch are 1/2λg and 1/4λg, respectively. A novel capacitive compensation technique, that is an annular gap which is concentric with the fed-probe, can introduce an annular gap capacitor to compensate the inductance caused by the fed-probe. By incorporating the U-shaped parasitic patches, an additional resonant frequency is introduced, which incorporates with the original resonant frequency produced by the rectangular patch, thus the wideband performance is achieved. The measured impedance bandwidth with S11 ≤ −10 dB is 40% (1.99 GHz) from 4.03 to 6.02 GHz, which covers 4.8–4.99 GHz band of 5G operation in China, WLAN 5.2 GHz (5.15–5.35 GHz), WLAN 5.8 GHz (5.725–5.825 GHz), and WiMAX 5.5 GHz (5.25–5.85 GHz). The measured peak gain is 9.1 dBi. An equivalent circuit model is established to provide a clear physical insight into the operation of the proposed antenna.
One challenge with broadband power line communication is the usage of the unshielded transport channels, which still had many interference factors when used to transmit high-speed data, such as noise, attenuation, reflection, radiation and time-varying impedance. In this paper, a two-wire power line is regarded as a long-line antenna. Based on the transmission line theory, reflection theory and radiation loss of long-line antenna, a theoretical model of two-wire power line communication transfer function has been established. The channel transmission characteristics of a power line network can be obtained with its basic elements, the geometric size, the characteristics of the conductor material and the surrounding medium, the structure of power line network, including the power line length, the number of branches and branch terminal load. In the frequency band of 1–200 MHz, the simulated transfer functions of the proposed model are in accordance with the measured results, which proved that the model could accurately predict the power line channel characteristics, and provides theoretical pre-selection guidance of frequency band, power setting and dynamic range for high-speed broadband power line communication.
An ultra-low power robust CMOS temperature sensor is presented for RFID. The BJT-based sensor employs a calibrated hybrid ADC, which combines a coarse 5-bit SAR conversion with a fine 9-bit delta-sigma conversion. For the purpose of being robust, an error correction method is proposed in this paper, which can calibrate the SAR errors caused by power supply and mismatch. A smart clock generator is also proposed to adapt the change of PTAT bias current, which provides the integrators more settling time in low temperature with low bias current and makes the delta-sigma ADC faster in high temperature to reduce the error caused by leakage. The sensor has been implemented in a 130 nm CMOS process. After a one-point temperature trimming, the sensor has a resolution of 0.015 from −40°C to 85°C, and only consumes 10 µA from 1.5 V supply.
A promising solution for assuring ultra-low latency in data-intensive application processing systems is processing in memory (PIM). Although most studies that have examined PIM-based computing systems have used cache memory, few have adequately explored a reasonable cache management policy for PIM. Therefore, this paper studies cache management policies for PIM-based computing systems and classifies existing PIM policies according to where they are located and how they are managed. To evaluate the policies, we model three types of PIM-based computing systems used in an in-memory system architecture. One model employs an internal-single cache, another an external cache hierarchy, and the other internal multiple cache-based PIM. We also simulate the performance and power consumption of the three models by their workloads, each with diverse characteristics. The experimental results show how cache policies influence the performance and power of PIM-based in-memory computing systems.
In the capsule endoscope application, a coil type antenna namely a normal-mode helical antenna was used because of suitable shape to deploy in a cylindrical capsule. In antenna design, many human tissue conditions such as a stomach, fat and skin should be taken into account. Here, losses of human tissues are changed depending on personal differences and basic feature of the antenna in numerical simulation. At some tissue examples, antenna input resistance (Rin) increases by the permittivity (εr) and conductivity (σ) effect were shown. In order to establish antenna design method, physical mechanism of antenna input resistance increases should be clarified. In this paper, input resistance increases are numerically clarified for all changing conditions of permittivity and conductivity through electromagnetic simulations. As for an antenna, self-resonant normal-mode helical antenna of 0.2 wavelength is designed at 402 MHz. In the case of εr = 11.6, the Rin value of 0.63 Ω at σ = 0 [S/m] is increased to the maximum value of Rin = 35 Ω at σ = 0.3 [S/m]. For understanding input resistance increases mechanism, electric field distributions around antenna are also shown. To ensure simulation adequateness, a measured result of input resistance is compared with simulated result.
Here, the resistive switching properties of Cu/Al2O3/p-Si and Cu/HfO2/p-Si devices are investigated in details. Both memory switching and threshold switching behaviors observed under different current compliance conditions. The transition between two switching modes is possible. Cu ion diffusion form conductive filaments inside the insulator and formation/dissociation mechanism induced the switching phenomenon. The device performances under both memory switching and threshold switching are possible for non-volatile storage memory and selector applications, respectively.