IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Volume 13 , Issue 21
Showing 1-9 articles out of 9 articles from the selected issue
LETTER
  • Tolga Yalçın
    Type: LETTER
    Subject area: Electron devices, circuits and modules
    2016 Volume 13 Issue 21 Pages 20160352
    Published: 2016
    Released: November 10, 2016
    [Advance publication] Released: May 13, 2016
    JOURNALS FREE ACCESS

    Permutation layer is a core component of substitution-permutation network block ciphers. Its design directly affects security and resource usage of the block cipher. It is a challenging problem to find permutation matrices with respect to predefined trade-off targets. In our work, we developed a hardware search engine on Xilinx Virtex-6 FPGA in order to accelerate the search of resource-efficient and secure (maximal branch number) 16 × 16 permutation matrices. Our engine completed the full spectrum search in 129 hours 48 minutes and found non-involutory and involutory permutation matrices with maximal branch number of 5 and minimum Hamming weight (HW) of 74 and 80, respectively. To the best of our knowledge, this is the first time that such a hardware accelerated custom search engine has been built and full spectrum permutation matrix search has been performed.

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  • Sherif Hekal, Adel B. Abdel-Rahman, Ahmed Allam, Hongting Jia, Adel Ba ...
    Type: LETTER
    Subject area: Microwave and millimeter-wave devices, circuits, and modules
    2016 Volume 13 Issue 21 Pages 20160591
    Published: 2016
    Released: November 10, 2016
    [Advance publication] Released: October 17, 2016
    JOURNALS FREE ACCESS

    This paper presents a new design for wireless power transfer (WPT) systems using asymmetric structures for the transmitter (TX) and the receiver (RX), and the TX/RX are constructed using spiral-strips defected ground structure (DGS) resonators. The proposed spiral-strips DGS resonator overcome the problem of low self-inductance that encountered by H-shape DGS resonator in [1, 2], so that the proposed WPT system that employs the proposed spiral-strips DGS resonators has better efficiency and higher power transmission distance. Design methodology of the proposed WPT system are formulated and fabricated. The measurement results show a WPT efficiency of 78% at a transmission distance of 40 mm with the TX and RX areas of 50 × 50 mm2 and 30 × 30 mm2, respectively.

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  • Lei Huang, Kun Wang, Shixiong Qi, Huaxi Gu, Yintang Yang
    Type: LETTER
    Subject area: Optical systems
    2016 Volume 13 Issue 21 Pages 20160719
    Published: 2016
    Released: November 10, 2016
    [Advance publication] Released: September 23, 2016
    JOURNALS FREE ACCESS

    Photonic interconnection network plays an increasingly significant role in on-chip microarchitecture. As the heart of optical network on chips, the photonic routers implement the function of routing package from input ports to output ports. In this letter, we proposed Panzer, a 6 × 6 optical router to meet the extension demand of on-chip network. Compared with other routers, Panzer has the lowest insertion loss and the fewest number of microring resonator. We simulated the 64-core improved mesh built with Panzer, and showed the end-to-end delay and network throughput under neighbor traffic patterns.

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  • Fengjuan Wang, Ningmei Yu
    Type: LETTER
    Subject area: Electron devices, circuits and modules
    2016 Volume 13 Issue 21 Pages 20160767
    Published: 2016
    Released: November 10, 2016
    [Advance publication] Released: October 21, 2016
    JOURNALS FREE ACCESS

    In this letter, an explicit analytical model for the stress induced by annular through-silicon-via (TSV) is developed according to the classical Lamé theory. And then, the analytical model is verified by finite element method (FEM) using ANSYS software. It is shown that, 1) the error between the analytical and FEM results is less than 5.6%, which proves the accuracy of the analytical model; 2) annular TSV induces a tensile radial stress and a compressive circumferential stress in the surrounding silicon. Finally, the guidelines are given for transistor placement to prevent the performance degradation.

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  • Minshun Wu, Yue Lin, Jiangtao Xu, Zhiqiang Liu
    Type: LETTER
    Subject area: Integrated circuits
    2016 Volume 13 Issue 21 Pages 20160784
    Published: 2016
    Released: November 10, 2016
    [Advance publication] Released: October 17, 2016
    JOURNALS FREE ACCESS

    An efficient algorithm is proposed for eliminating the requirement of coherent sampling in multi-tone spectral test of ADCs. Instead of repetitively performing the single-tone non-coherency correction algorithms, the proposed method simultaneously corrects all non-coherent input signal tones to be coherent, which improves the algorithmic reliability and efficiency greatly. Theoretical analysis and simulation results demonstrate that the developed method can achieve the same test accuracy and equivalent efficiency as the coherent sampling method in both wide and narrow tone spacing cases. Comparative studies from the windowing techniques and the single-tone non-coherency correction methods validate the test accuracy, reliability and efficiency of the proposed method.

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  • Koichiro Adachi, Takanori Suzuki, Kouji Nakahara, Shigehisa Tanaka, Ak ...
    Type: LETTER
    Subject area: Integrated optoelectronics
    2016 Volume 13 Issue 21 Pages 20160866
    Published: 2016
    Released: November 10, 2016
    [Advance publication] Released: October 21, 2016
    JOURNALS FREE ACCESS

    A facet-free surface-emitting distributed feed-back (DFB) laser is proposed for a low-cost optical module. A 45° mirror is integrated on front of a DFB laser for surface emission. Instead of a facet with a high-reflection (HR) coating, a distributed Bragg reflector mirror, a photodiode, and a window structure are integrated on its rear. It is experimentally confirmed this rear structure work same as the facet with the HR coating. The proposed facet-free laser demonstrated on-wafer measurement and attained high-reliability under high humidity. These results indicate the proposed laser can be manufactured cost-effectively without chip-level screenings and used in non-hermetic packages.

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  • Jinbao Zhang, Ning Wu, Xiaoqiang Zhang, Fang Zhou
    Type: LETTER
    Subject area: Integrated circuits
    2016 Volume 13 Issue 21 Pages 20160872
    Published: 2016
    Released: November 10, 2016
    [Advance publication] Released: October 17, 2016
    JOURNALS FREE ACCESS

    Fault attack is a very effective way to crack the key for cipher chip. Among existing fault attack countermeasures, the infection countermeasures are very effective means, but, most existing infection countermeasures are based on the single fault assumption, and the accuracy of fault injections has significantly improved in the late years, it has become possible to implementation of double fault attacks in specific circuit regions, and it is, therefore, flawed in the resistance to double fault attacks. Aim at the flawed mentioned, this paper proposes a countermeasure called random infection mechanism to resist fault attacks. We use the encryption/decryption circuit to construct the fault diffusion pattern and avoid under the possibility of double error attacks. Furthermore, in order to against single byte fault attacks, we introduce random numbers to make the fault diffusion randomization. Experiments are carried out to verify the proposed algorithm and the results show that the proposed random infection mechanism can resist fault attacks effectively including single byte error attacks.

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  • Fan Feng, Li Li, Kun Wang, Feng Han, Baoning Zhang, Guoqiang He
    Type: LETTER
    Subject area: Integrated circuits
    2016 Volume 13 Issue 21 Pages 20160893
    Published: 2016
    Released: November 10, 2016
    [Advance publication] Released: October 17, 2016
    JOURNALS FREE ACCESS

    To meet the increasing demand of large bandwidth and high throughput in modern radar system, we proposed a reconfigurable application specified processor (RASP) according to the feature of radar digital signal processing applications. RASP is a reconfigurable coprocessor based on hierarchical floating-point operation elements that is capable of executing a set of fundamental subalgorithms, take these subalgorithms as the minimal task node can improve the computational efficiency tremendously. The experimental results show that the processor performance exceeds TI state-of-the-art DSP by 1.05× to 3.22×. Our reconfigurable processor can be integrated into customizable radar systems, it was fabricated with TMSC 40 nm CMOS process and has an area of 19.2 mm2.

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  • Ning Tai, Kaibo Cui, Chao Wang, Naichang Yuan
    Type: LETTER
    Subject area: Electron devices, circuits and modules
    2016 Volume 13 Issue 21 Pages 20160924
    Published: 2016
    Released: November 10, 2016
    [Advance publication] Released: October 21, 2016
    JOURNALS FREE ACCESS

    In this paper, a novel coherent noise jammer is proposed against the pulse compression radar. The algorithm is implemented by modulating the sampled radar signal according to the pseudo-random sequence. A high speed ADC is adopted to sample the baseband radar signal from 50 MHz to 1150 MHz and the parallel data processing in FPGA of Virtex-6 is introduced. The characteristic of the jamming signal in time domain and frequency domain is analyzed in detail. Mathematic expressions indicate that multiple false targets are induced after pulse compression and the real target is protected effectively. Compared with the traditional non-coherent noise jammer, the jamming signal created by our jammer is coherent with the matched filter and is able to obtain some processing gain. Simulation results and the implementation of the proposed method validate the correctness and effectiveness of the design.

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