A problem with studies to utilize high-capacity RAM inside a SSD as buffer cache for NAND flash memory is their assumption that the NAND is a single chip, when current SSDs parallelise I/O requests through multiple NAND chips. Further, the studies focus on the buffer replacement policy, overlooking the more fundamental question of whether to use the buffer as read/write or write-only buffer. This paper compares the performance of the two buffer types in an SSD environment with internal parallelism using block I/O traces of representative servers and finds the followings. i) Even if the buffer replacement policy is the same, the average response time differs by up to 29.8% depending on the buffer type. Overall, the read/write buffer has a shorter average response time due to a higher buffer hit ratio. ii) However, despite a low buffer hit ratio, the average response time of read requests is reduced by up to 82.5% in the write-only buffer. This is because the read misses are handled bypassing the buffers in the write-only buffers, and thus there is no need to wait until the victim dirty buffer is flushed. iii) The response time is mainly determined by the waiting time, and the long waiting time occurs when evicting a dirty buffer. Therefore, when designing a buffer management policy, it should be considered to flush the tail dirty buffers in advance.
In this paper, we analyze and propose spatially coupled low-density parity-check (SC LDPC) codes for power line communications (PLC). With windowed-sequential encoding and decoding characteristics of SC LDPC codes, the low latency error correction with superior performance becomes the cornerstone for proposing these codes for PLC systems. The communication channels in PLC have impulsive noise, we use Bernoulli-Gaussian model which has heavy tail distribution for this channel. Through computer simulations, we compare these codes with block LDPC codes and show that SC LDPC codes perform better due to connectivity between coupled blocks.
A novel optimization design method using boundary-based weighted sum filtering operator is proposed for microstrip filter design. The proposed operator is combined with multiobjective evolutionary algorithm based on decomposition combined with enhanced genetic operators and two-dimensional median filtering operator (MOEA/D-GO-II), which can maintain the population diversity and obtain wider rejection bandwidth. For verification, it is used to design fragment-type microstrip band-stop filter for rejecting one of the fifth generation (5G) bands, 3.3 GHz–3.6 GHz. Both simulated and measured results verified the expected responses of the design. Comparison result shows that more alternative designs could be obtained using the proposed method.
In this letter, the fractal defected structure (FDS) is firstly used to design miniaturized balanced bandpass filter (BPF). A novel quarter-mode substrate integrated waveguide resonator (QMSIWR) with etched symmetrical FDSs is presented, which has a lower resonate frequency (f0) and acceptable unloaded quality (Qu) at TE201 mode. Based on this novel resonator and eighth-mode substrate integrated waveguide resonator (EMSIWR) with etched the FDS, a compact balanced BPF with a reduced size over 72.5% is designed, which can implement one transmission zero (TZ) on each side of the differential-mode (DM) passband by using cross-coupling technology. Meanwhile, the common-mode (CM) signal is suppressed below −23.6 dB in the DM passband. The measured results agree well with the simulated ones.
A capacitive humidity sensor based on a flip-chip self-packaged process is presented. An air gap was applied to separate two electrodes of the sensitive capacitor and reduce the leakage loss especially in high humidity environment. Two typical structures of the sensor were developed. Both static and dynamic properties of fabricated sensors were evaluated. The dielectric loss tangent of both structures were less than 8‰ even at 95%RH. Meanwhile, both response time and recovery time of the sensors were short because one side of the sensitive layer was open to the air.
This paper reports the measurement results, obtained by terahertz (THz) time-domain spectroscopy (TDS), for a dielectric substrate used in high-frequency components. The results demonstrate that the present THz-TDS measurement system, which uses collimated THz waves, can be used to nondestructively observe the layer structure of the substrate. The measured layer thicknesses agree with the values obtained through cross-sectional optical micrographs of the dielectric substrate. The relative dielectric constant of the substrate is also estimated from the time-of-flight of the observed waves reflected at the front and back of the substrate surfaces.
A dual-output design of inverter chain that is hardened against P-hit single-event transient (SET) is proposed in this paper. The output nodes of the proposed inverter chain are hardened by dual-output topological structure design and stacked PMOSs with isolation. The simulation results based on a 65 nm CMOS technology suggest that the proposed design can eliminate SET pulse significantly. In comparison with the conventional inverter chain and inverter chain using the source-isolation technique, the proposed design is capable of maintain the output steadily irrespective of whether an ion hits “0” or hits “1”, i.e., the struck node is at logic “0” or logic “1”. Besides, the SET pulse occurring at any stage of inverter chains with the proposed methodology will not disturb the final output, as long as it does not occur at the final stage.
This letter presents a modified stochastic finite-difference time-domain (S-FDTD) method and its perfectly matched layer (PML) implementation. In the modified algorithm, the electric field variance equation is derived from a D-H form. By using the bilinear Z transform, the algorithm is applicable for different types of dispersive materials. Based on the stretched coordinate (SC) system, the PML implementation is also proposed. Numerical examples are presented to show the effectiveness of the proposed method.
A push-pull multi-loop architecture for the digital low drop-out (D-LDO) regulators is presented with small variations of output voltage and 200 mA load capacity. The propose D-LDO adopts voltage peak detector (VPD) to observe the output voltage ripples. Once undershoot or overshoot on output voltage is detected, the push-pull feedback loop is quickly triggered, which minimizes the voltage shoots even if the load current changes abruptly. Meanwhile, the shift register (S/R) feedback loop regulates the output voltage to desired value with high accuracy. Hence the D-LDO recovers steady state with greatly small voltage spikes. The proposed D-LDO is designed and simulated in SMIC 65 nm CMOS process with a 0.42 mm2 active area. The simulated voltage overshoot and undershoot are 27 and 26 mV respectively, with load step of 20 to 200 mA with a 10-ns edge time. The max load current and quiescent current are 200 mA and 400 µA, respectively, and the peak current efficiency is 99.8%.
A 12.5 Gbps continuous-time linear equalizer circuit (CTLE) constructed with two stage equalizer, three stages of limiting amplifier and designed in 55 nm CMOS technology for high speed serial interface of JESD204B standard is presented. Beside using degeneration RC pair to compensate low pass response of the channel and high frequency signal loss, the first equalizer also utilizes inductive shunt peaking technology to further extend the bandwidth of input signals. The proposed circuit was simulated with post layout parasitic extraction and achieves around 20 ps peak-to-peak jitter, 1.08 V voltage swing and a data rate of 12.5 Gbps through 10-inch FR-4 PCB trace with the characteristic of low equalization power consumption.
An oscillator-based sensor is proposed that uses a surface-wave resonance effect that happens in a capacitive metal mesh to detect dielectric materials sensitively in the terahertz region. Experiments performed at frequencies around 0.1 THz show that the oscillator-based sensor has a high sensitivity of 2.6 GHz/RIU (refractive index unit) and can identify a small difference of 3.8 × 10−4 in the refractive index of a dielectric material.
A conformal composite absorber with non-uniform resistors was designed to achieve broadband absorption characteristics. An improved characteristic basis function method was proposed, which separates the load-resistors matrices in the inverse of impedance matrices by using the Woodbury matrix inverse lemma. The extraction of characteristic basis functions was accelerated, and the total time of solving the matrix equation was reduced obviously. Finally, a prototype was fabricated and measured with the optimized resistors. The measured results showed that proposed conformal composite absorber achieved good absorption in the 2.8–8.0 GHz for different polarized incident wave.
This study proposed a design for a metamaterial that has the Mu-Near-Zero property in a certain frequency band in order to reduce the magnetic flux leakage of a wireless power transfer system. The proposed structure had spiral coils arranged in a strip line on a dielectric substrate and used a capacitor connected in parallel to induce magnetic resonance and attain the Mu-Near-Zero property. In this way, magnetic fields are reflected and thus become less likely to leak to the rear of the coils. To verify the performance of the proposed structure, the designed metamaterial was positioned at the rear of the transmission coil, and the efficiency of the transmission and receiver coils and the strength of the leaking magnetic fields were observed. The transmission efficiency at a 0.3 m distance between the transmission and receiver coils was 40.8%, which was similar to that of the conventional structures, and the reduction of magnetic flux leakage improved by a maximum of 79.7%.
This paper presents a low dropout regulator (LDO) regulated DC-DC converter with suppressed voltage ripple and enhanced light load efficiency. In this proposed hybrid system, an adaptive dropout technique, where DC-DC converter takes the gate of LDO’s power transistor as the feedback point to combine DC-DC converter and LDO in one control loop, is adopted to make LDO’s dropout voltage adaptive to load current rather than fixed value. Owing to the cascaded LDO and the adaptive dropout technique, the hybrid system obtains a small voltage ripple with improved overall efficiency, especially in light load. The chip was implemented in 130 nm CMOS process. The voltage ripple is reduced to 3 mV at the load current of 40 mA. The overall efficiency of the proposed hybrid system is 60.74% in 30 mA light load and is improved by 15.6% compared with conventional fixed dropout voltage architecture.
Achieving low-frequency waveguide structures that operate in the low-frequency (LF) band or megahertz range is challenging because of the long wavelengths involved. In this work, we propose a domino-structured magneto-inductive waveguide for electromagnetic energy transmission in radio-frequency identification (RFID) systems at frequencies as low as 13.56 MHz. It is implemented using a metastructure based on a domino-arranged split ring resonator (SRR). Lumped components are introduced into each SRR ring that significantly reduce the ring resonant frequencies. An analytical energy transfer model is proposed based on inductive coupling because almost all the energy is transmitted through the magnetic field. Transmission coefficient measurements were carried out and the experimental results agree well with the energy transfer model. The proposed structure has a wide transmission bandwidth that is typically 30% to 80% of the center frequency. This bandwidth is sufficient to cover the entire 13.56 MHz industry-science-medical (ISM) band and is thus suitable for energy transmission for RFID systems. The waveguide has wide application potential that may be used to extend RFID reader sensing distances or split near-field RFID electromagnetic energies in multi-point applications.
A novel microstrip patch antenna loaded with parasitic metal strips is proposed. Two identical parasitic metal strips are asymmetrically located along with the two radiating edges of a conventional patch antenna. Two coupling slots are etched adjacent to the strips on the ground plane to realize energy transmission. Therefore, a new resonant mode TM30 mode generated by parasitic metal strips together with the original TM10 mode result in wide impedance bandwidth. Experimental results indicate that an impedance bandwidth of 23% from 13.8 to 17.4 GHz is obtained, with a low profile less than λ0/20. Moreover, the proposed antenna presents 1-dB gain flatness across the operating bandwidth.