IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Volume 18, Issue 18
Displaying 1-3 of 3 articles from this issue
LETTER
  • Yunha Kang, Junyoung Song
    Article type: LETTER
    Subject area: Integrated circuits
    2021 Volume 18 Issue 18 Pages 20210253
    Published: September 25, 2021
    Released on J-STAGE: September 25, 2021
    Advance online publication: August 24, 2021
    JOURNAL FREE ACCESS

    This paper describes quad-rate 1-FIR 2-IIR decision feedback equalizer (DFE) with summer reduction technique for high-speed serial communication in a 65nm CMOS technology. The proposed DFE halves the number of summers by using resettable slicer and summer with multiplexer. Therefore, the proposed DFE reduces power consumption significantly because summer dissipates a lot of power. The DFE that is verified by pre-layout simulations achieved 0.69 unit-interval (UI) eye-opening. The proposed DFE that is designed with a 65-nm technology operates at 28Gb/s and occupies 0.023mm2. Finally, the power efficiency of the proposed DFE is 0.88-pJ/bit.

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  • Kentaro Takeda, Hiroyuki Torikai
    Article type: LETTER
    Subject area: Integrated circuits
    2021 Volume 18 Issue 18 Pages 20210310
    Published: September 25, 2021
    Released on J-STAGE: September 25, 2021
    Advance online publication: August 19, 2021
    JOURNAL FREE ACCESS

    In this paper, we present a cochlea model whose nonlinear dynamics are described by an asynchronous cellular automaton. Our proposed model is demonstrated to enable the reproduction of two-tone distortion products. The proposed model is implemented on a field-programmable gate array (FPGA). It is subsequently demonstrated that our proposed model can be implemented using fewer hardware resources than a conventional cochlea model, which is a Hopf-type cochlea model, implemented on a digital signal processor performing a numerical integration.

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  • Xiangkun Yin, Fengjuan Wang
    Article type: LETTER
    Subject area: Electron devices, circuits and modules
    2021 Volume 18 Issue 18 Pages 20210319
    Published: September 25, 2021
    Released on J-STAGE: September 25, 2021
    Advance online publication: August 20, 2021
    JOURNAL FREE ACCESS

    Aimed at the emerging on-chip three-dimensional through-silicon vias (TSVs)-based inductor, the formula for the DC inductance is proposed. And then, based on this formula and the equivalent circuit model analytical models of AC inductance and quality factor are proposed considering frequency effect. Finally, the TSV-based inductors are fabricated and measured. It is shown that the reported results match very well with each other.

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