IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Volume 11 , Issue 23
Showing 1-15 articles out of 15 articles from the selected issue
LETTER
  • Jun Sun, Yan Han, Yuji Qian
    Type: LETTER
    Subject area: Integrated circuits
    2014 Volume 11 Issue 23 Pages 20140877
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 13, 2014
    JOURNALS FREE ACCESS
    This paper presents a design of a 100 kHz 0.54 µW fully integrated current-mode relaxation oscillator. The transistors in the sub-threshold region, the current-mode comparator, the current-starving RS flip-flop are used to reduce the power consumption. Meanwhile, the employing of the current-starving RS flip-flop significantly reduces the sensitivity of the frequency to supply voltage fluctuation. The temperature coefficient is 51 ppm/°C from −40 to 85 °C, and the line regulation is −0.40%/V over a supply voltage range from 1.0 to 2.0 V. This oscillator is designed in SMIC 0.18 µm CMOS technology and operates at minimum supply voltage of 1.0 V with drawn current of 540 nA at room temperature.
    Download PDF (1083K)
  • Koichi Narahara
    Type: LETTER
    Subject area: Microwave and millimeter wave devices, circuits, and systems
    2014 Volume 11 Issue 23 Pages 20140881
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 19, 2014
    JOURNALS FREE ACCESS
    Soliton decay in a composite right- and left-handed transmission line periodically loaded with Schottky varactors, termed a Schottky CRLH line, is characterized to obtain broadband envelope pulses. When the three waves in the line satisfy the wave-number and frequency resonance conditions, they are governed by the three-wave resonant interaction equation, which have solutions that exhibit soliton decay, i.e., the decay of the highest frequency envelope into those carried by the other two frequency solitons. Due to the left-handedness, solitons resulting from the decay can have much smaller width than the incident envelope. This paper discusses the potential of a Schottky CRLH line as a generator of broadband envelope pulses.
    Download PDF (2084K)
  • Seung Hoon Kim, Jihye Shin, Jinju Lee, Xiao Ying, Hanbyul Choi, Kyungm ...
    Type: LETTER
    Subject area: Integrated circuits
    2014 Volume 11 Issue 23 Pages 20140927
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 13, 2014
    JOURNALS FREE ACCESS
    This paper introduces a four-channel optical receiver array implemented in a standard 1P4M 0.18 µm CMOS technology for the applications of active optical HDMI cables. Each channel consists of a current-mirror transimpedance amplifier, a five-stage differential limiting amplifier, and an output buffer, demonstrating 81-dBΩ transimpedance gain, 1.8-GHz bandwidth even with 0.5-pF photodiode capacitance, −18.3-dBm optical sensitivity for 10−12 BER & 0.6-A/W responsivity, and 51.7-mW power dissipation from a single 1.8-V supply. The whole chip occupies the area of 1.35 × 2.46 mm2 including pads. The measured eye-diagrams of the array confirms wide and clear eye-openings up to 4.0-Gb/s operations.
    Download PDF (4513K)
  • Myung Kyoon Yim, Kyoung Min Lee, Tae Hee Han
    Type: LETTER
    Subject area: Electron devices, circuits, and systems
    2014 Volume 11 Issue 23 Pages 20140944
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 11, 2014
    JOURNALS FREE ACCESS
    Recent demand on more advanced functionalities in mobile devices has led to a drastic increase in power consumption of the device. Therefore, heat dissipation has become a major concern. To effectively overcome the thermal barrier based on the surface temperature of mobile devices, we propose a surface temperature-aware thermal management (STaTM) technique to be incorporated into a mobile application processor (AP), which plays a key role in the heat management of the mobile device. The proposed STaTM enables the AP to maximize the energy efficiency using accuracy-enhanced rapid surface temperature estimation. Experimental results show that the proposed solution achieves an average performance improvement of 14.2% when compared to conventional thermal management techniques.
    Download PDF (1075K)
  • Seung Hoon Kim, Xiao Ying, Hanbyul Choi, Kyungmin Lee, Chaerin Hong, S ...
    Type: LETTER
    Subject area: Integrated circuits
    2014 Volume 11 Issue 23 Pages 20140953
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 13, 2014
    JOURNALS FREE ACCESS
    This letter presents a multi-rate clock and data recovery circuit realized in a standard 65-nm CMOS technology, which operates from 3.125 Gb/s to 22 Gb/s. In order to cover the wide frequency range, a modified four-stage differential ring VCO is exploited, which provides not only the fast tracking ability from its coarse tuning, but also the precise tra cking from its fine tuning. Also, a voltage-regulated active filter is employed to reduce the ripples of the VCO control voltages. It helps to fasten the lock-in time of the proposed CDR circuit and improve the jitter characteristics against PVT variations. Measurements reveal that the CDR chip demonstrates very wide capture range of 3.125 ∼ 22 Gb/s, 3.3 ps,rms data jitter at 20 Gb/s, and 112-mW power dissipation from a single 1.2-V supply. The chip core occupies the area of 0.12 mm2 only.
    Download PDF (4697K)
  • Hui-Ming Qu, Xiao-Hui Yang, Qi Zheng, Xin-Tao Wang, Qian Chen
    Type: LETTER
    Subject area: Electronic instrumentation and control
    2014 Volume 11 Issue 23 Pages 20140965
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 11, 2014
    JOURNALS FREE ACCESS
    The heat dissipation problem of high-power LEDs (Light-Emitting Diodes) limits their applications in automobile headlights. The heat demand for cooling LED headlights is analyzed based on heat transfer theory. This study proposes an initiative heat dissipation technology of temperature feedback control combined heat pipe and heat sink. The corresponding hardware and software control processes are designed. The temperature feedback control is realized with an MCU (Micro Control Unit) that judges and controls the synthetic jet device working process. A 3D model for the heat pipe radiator is constructed using CATIA. The model is optimized with the fluid thermodynamic simulation software FLOEFD. Finally, a sample lamp is prepared and tested with an infrared thermometer. The temperature distribution on each LED light source and radiator fin is quantitatively measured and analyzed. These results confirm that the designs of the thermal management system and the proposed technique solve the heat dissipation problem of high-power LED automotive headlights under the ambient temperature 50 °C indeed.
    Download PDF (3691K)
  • Yue Xi, Zhongliang Deng, Jichao Jiao, Lu Yin, Ke Han, Di Zhu
    Type: LETTER
    Subject area: Electron devices, circuits, and systems
    2014 Volume 11 Issue 23 Pages 20140979
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 19, 2014
    JOURNALS FREE ACCESS
    CBOC is the final choice of Galileo E1 OS signal. It is a result of multiplexing BOC(6,1) with BOC(1,1). It has a main drawback that is the autocorrelation function has multiple side-peaks, which will lead to ambiguous acquisition. In this paper we propose a novel method to accomplish unambiguous acquisition. The acquisition scheme is first described, and the mathematical model is introduced. Finally, the performance of this method is analyzed. This method shows very good and interesting results, cancelling the side peaks of the autocorrelation function completely and decreasing the total acquisition time especially in the case the Doppler frequency step is very small.
    Download PDF (1066K)
  • Zhenghuan Xia, Guangyou Fang, Shengbo Ye, Qunying Zhang, Chao Chen, He ...
    Type: LETTER
    Subject area: Microwave and millimeter wave devices, circuits, and systems
    2014 Volume 11 Issue 23 Pages 20140981
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 13, 2014
    JOURNALS FREE ACCESS
    A novel handheld pseudo random coded ultra-wideband (UWB) radar for human sensing applications is presented in this paper. In order to reduce the size of the radar and obtain good penetrability, the center frequency of the m-sequence is assigned to about 1.1 GHz. The peak voltage of the m-sequence is 4.5 Vpp, while the length of the m-sequence can be chosen to obtain different signal-to-noise ratio (SNR). The digital transmitter, the dual-channel receiver and the clock synchronization are discussed in detail. The experimental results show that the proposed handheld pseudo random UWB radar has good detection performance for human sensing applications in complex environment.
    Download PDF (3534K)
  • Xiaomin Shi, Xiaoli Xi
    Type: LETTER
    Subject area: Microwave and millimeter wave devices, circuits, and systems
    2014 Volume 11 Issue 23 Pages 20140991
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 19, 2014
    JOURNALS FREE ACCESS
    A single patch resonator with right crossed slots and rectangular perturbation is proposed to implement a dual-mode dual-band bandpass filter. The first resonance varies with the width and length change of the slots leading to a flexibly tuned first passband during the design phase. The second resonance is not perturbed because of the right crossed slots. The rectangular perturbation located at the diagonal creates transmission zeros near the first passband edges while the spur-lines generate transmission zeros near the second passband so as to achieve higher frequency selectivity. Therefore the bandwidths of the two passbands can be tuned independently. A dual-mode dual-band filer operating at 1.57 and 5.2 GHz for GPS and WLAN application is designed and manufactured for demonstration. Good agreements are found between simulation and measurements.
    Download PDF (2365K)
  • Dongdong Zhong, Yan Han, Jun Sun, Qian Zhou, Ray C. C. Cheung, Wenquan ...
    Type: LETTER
    Subject area: Electron devices, circuits, and systems
    2014 Volume 11 Issue 23 Pages 20140993
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 13, 2014
    JOURNALS FREE ACCESS
    A simple and perfectly current matched charge pump for ultra-low voltage applications in phase-locked loops is presented. The charge pump is based on a gate switching architecture to ensure the output dynamic range. The specially designed dual compensation circuits using high threshold transistors together with regular threshold transistors ensure the current mismatch below 1.5% while keeping the output voltage ranging from 0.02 to 0.76 V in 40 nm CMOS Mixed-signal technology at a 0.8 V supply. And the additional body bias circuit reduces the negative impact from the process variation. The proposed circuit helps PLLs reduce the phase offset and spurs even at ultra low supply voltage.
    Download PDF (2910K)
  • Li Kang, Lingyun Ye, Kaichen Song
    Type: LETTER
    Subject area: Electronic instrumentation and control
    2014 Volume 11 Issue 23 Pages 20140994
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 21, 2014
    JOURNALS FREE ACCESS
    This paper reports the development and experimental evaluation of an in-situ calibration algorithm of the misalignment mounting angle matrix between the Strapdown inertial navigation system (SINS) and Doppler sensor which are practically used for accurate underwater navigation. Most previously reported methods required the SINS to be aligned first to output accurate attitude before the calibration. By separately treating the body frame and the navigation frame attitude update, the algorithm in this paper could be simultaneously carried out during the SINS attitude alignment stage. Simulation and experiment results show that the calibration could be done in 300 s and the position error during the navigation is less than 0.8% of the voyage distance.
    Download PDF (2058K)
  • Fan Chaojie, Wang Ke, Pan Wenjie, Zhou Jianjun
    Type: LETTER
    Subject area: Integrated circuits
    2014 Volume 11 Issue 23 Pages 20140995
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 19, 2014
    JOURNALS FREE ACCESS
    A digital calibration scheme simultaneously correcting both linear and nonlinear errors of inter-stage amplifiers in pipelined ADCs is proposed. Two modes of dithering are employed for the linear gain measurement, and the difference between their results is used to indicate the nonlinear error. The additional analog complexity introduced by the proposed technique is no more than that in a classical signal dependent dithering scheme. Behavioral simulation shows that the proposed calibration scheme is able to correct both linear and nonlinear errors within 6 × 107 conversion steps, and improve SNDR from 47 dB to about 80 dB in a prototype 14-bit pipelined ADC having 5% full-scale gain compression in the 1st stage’s residue amplifier.
    Download PDF (1705K)
  • Lianxi Liu, Junchao Mu, Ning Ma, Zhangming Zhu
    Type: LETTER
    Subject area: Integrated circuits
    2014 Volume 11 Issue 23 Pages 20141000
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 07, 2014
    JOURNALS FREE ACCESS
    This paper presents a novel highly efficient 5-stage RF rectifier in SMIC 65 nm standard CMOS process. To improve power conversion efficiency (PCE) and reduce the minimum input voltage, a hybrid threshold self-compensation approach is applied in this proposed RF rectifier, which combines the gate-bias threshold compensation with the body-effect compensation. The proposed circuit uses PMOSFET in all the stages except for the first stage to allow individual body-bias, which eliminates the need for triple-well technology. The presented RF rectifier exhibits a simulated maximum PCE of 30% at −16.7 dBm (20.25 µW) and produces 1.74 V across 0.5 MΩ load resistance. In the circumstances of 1 MΩ load resistance, it outputs 1.5 V DC voltage from a remarkably low input power level of −20.4 dBm (9 µW) RF input power with PCE of about 25%.
    Download PDF (1889K)
  • Wei Yi, Hui Xu, Kai Bu, Nan Li
    Type: LETTER
    Subject area: Storage technology
    2014 Volume 11 Issue 23 Pages 20141007
    Published: 2014
    Released: December 10, 2014
    [Advance publication] Released: November 21, 2014
    JOURNALS FREE ACCESS
    For high I/O performance, Solid State Drive (SSD)-based all Flash arrays (AFAs) are widely employed to larger scale storage systems. However, the aging problem of SSDs limits the lifetime and reliability of AFA. In order to extend the lifetime of AFA, we designed a capacity-based differential RAID (Redundant Array of Independent Disks) scheme (CDiff-RAID). In the proposed scheme, the array is initialized by a group of SSDs with unequal capacities. The smaller SSDs suffer more erase operations and age quickly. To maintain the age differential, the worn SSDs are continually replaced by new SSDs. Compared with parity-based Diff-RAID, the age differential in our scheme is independent of workload and the time-consuming of reconstruction is greatly reduced. We also evaluated the I/O performance of CDiff-RAID using SSD simulators. The proposed scheme outperforms Diff-RAID scheme in sequential and random traces in most cases.
    Download PDF (1548K)
ERRATA
feedback
Top