An efficient design methodology for adaptive system based on direct configuration bitstream (CB) evolution has been proposed, which models the relationship between resources and CBs of the field programmable gate array (FPGA), and then generates CBs online according to the models built. The system framework and design methodology have been given and verified on Xilinx Virtex-5 FPGA. Results show that it can implement embedded online self-programming of FPGA’s logic and routing resources via modifying CBs directly; and has lower resources overhead, lesser time consumption, and stronger adaptability than the mainstream evolution approaches.
Unidirectionally coupled phase oscillators in a ring are simple in structure but unsuitable for application in central pattern generators (CPGs) for six-legged walking due to coexisting stable synchronization patterns. This paper shows that the coupled oscillators can be applied to a CPG by utilizing a non-periodic signal generator as a clock. The non-periodic clock-driven coupled oscillators are implemented by sequential logic circuits using a field programmable gate array and analog circuit. A laboratory experiment confirms that a hexapod robot mounting the implemented circuits can realize six-legged walking.
In this paper, a radiation-hardened by polar design 14T (RHPD-14T) SRAM cell for space applications is proposed. Performance of the proposed RHPD-14T cell is analyzed by estimating various design metrices with 65-nm complementary metal-oxide-semiconductor (CMOS) technology. The proposed RHPD-14T can tolerate all single-node upset and partial double-node upset based on combining radiation hardened by polar design technology together with reasonable layout topology. Simulation results show that write access time of RHPD-14T is 1.83×/1.59×/1.56×/1.12×/1.05× shorter than RSP-14T/QUCCE-10T/DICE/S4P8N/We-Quatro (@VDD=1.2V). Word line write trip voltage of RHPD-14T is 2.67×/2.22×/1.35×/1.29×/1.26× higher than QUCCE-10T/DICE/We-Quatro/S4P8N/RSP-14T (@VDD=1.2V). Hold static noise margin of RHPD-14T is 14.85×/7.15×/1.05× higher than DICE/S4P8N/RHPD-12T (@VDD=1.2V). In addition, Monte Carlo (MC) simulations have proved that RHPD-14T has low fluctuation, strong stability, stable recovery ability and strong single effect upset (SEU) hardened.
This paper presents ultra-wideband 18.2-42.0GHz LC injection-locked frequency doubler (ILFD) with transformer inputs. To expand the locking range, the proposed ILFD incorporates the transformer connected to the source of the gain-cell transistor to obtain high linearity of the input circuitry, moreover, the input matching frequency shifts from the free-run frequency of the oscillator. The measured maximum locking range exhibited 79.1% from 18.2GHz to 42.0GHz output at 0dBm input power and the locked phase noise at 1MHz offset from 28GHz carrier frequency was -112.1dBc/Hz under 1.7mW power consumption. Also, the lowest locked phase noise at 1 MHz offset from the carrier was -122.8dBc/Hz under 21.2mW power consumption, and it was only 2.2dB degraded from the theoretical value. The process technology used in this work was TSMC-180nm CMOS.
Radar plays a crucial role in the detection of ships, structures, drones, etc. For offshore vessels, radar is installed on the top of the ships to observe their position and the land for contact accidents and defense applications such as the Aegis system. However, the accuracy of radar position detection is limited by the uncertainty of the radar calibration. In this study, we demonstrate the determination of the position of an island with high accuracy using laser-based light detection and ranging by measuring the distance and using it as a reference distance.
In this paper, we propose a novel modeling attack approach to predict the responses of XOR arbiter physical unclonable functions (XOR APUFs), which improves the prediction accuracy and reduces the computational time. The high-dimensional mathematical model of XOR APUF is established and its weakness is analyzed. Furthermore, a modeling attack approach based on the generalized regression neural network (MA-GRNN) is introduced to approximate the responses of XOR APUFs. As a proof-of-concept, four popular machine learning algorithms are utilized to evaluate the attack efficacy of 3-XOR, 4-XOR, 5-XOR and 6-XOR APUF schemes. Experimental results show that the MA-GRNN achieves a high prediction accuracy compared to the other three modeling attack approaches while requiring less computational time simultaneously.
This paper proposes a novel damping method for the resonance problem of the LCL output filter in the active power filter (SAPF). The wide control bandwidth of the SAPF has made this problem critical. The proposed method is based on an active damping circuit, which does not affect SAPF control. It involves an auxiliary converter connected in series with a filter capacitor to detect and inject back the resonant current as the reference signal of the converter. The stability of the proposed method is analyzed using frequency response and compared to the traditional method to prove theoretical feasibility. The experimental results demonstrate the effectiveness of the proposed method, which has a better switching harmonic suppression effect compared to the traditional method.
This paper presents a capacitively coupled digital isolator with low power consumption and superior Common Mode Transient Immunity (CMTI). It proposes a multiple-pulse-coding architecture and a receiver with an adaptive architecture, which improve the transmission accuracy, eliminate the CMT and achieve low power consumption. The multiple-pulse-coding characterizes edge signal with multi-pulses. The receiver consists of an adaptive pre-amplifier and an adaptive comparator. Fabricated in a 0.18μm CMOS process, the chip achieves 200kV/μs CMTI, 60μA static current, 250μA dynamic current and 14kV isolation breakdown voltage with the area of the isolation capacitance of 2×104μm2.
In this study, a mechanical movable device is used to achieve a mechanical tuning phase shifter with adjustable substrate, which has a huge potentiality of tuning range. The main body of phase shifter is microstrip structure. The substrate has two layers with one movable layer. By moving the movable layer, the equivalent relative permittivity of component is changed and tunability is realized. The phase is -128.2° to 96.1° at 6GHz while the transmission coefficient S21 is from -2.09dB to -2.70dB throughout the entire tuning process. The movable layer is better to be with high relative permittivity and relative permeability to reach a wider tuning range.
This study presents the enhanced sensitivity and low temperature drift effect on the performance of a novel double-cavity capacitive pressure sensor for micr-pressure detection. For theoretical analysis, the relative capacitance change of the sensor are formulated by using COMSOL Multiphysics. In experiments, a sensor model is fabricated by 3D printing technology. The obtained result of the sensor having a flexible diaphragm shows the sensitivity is improved by employing additional double-cavity at room temperature. In addition, the temperature drift effect of the designed pressure sensor is measured and examined through comparison with the traditional sensor. The temperature drift effect can be effectively suppressed by adopting the novel structure. It is expected to realize the micro-pressure detection technology which integrates the characteristics of high sensitivity, large linearity range and low temperature drift.
High-bandwidth interconnects between chiplets employ parallel interfaces, whose performance is limited by inter-channel crosstalk. In order to reduce the delay uncertainty (jitter) induced by crosstalk, this work analyzes the effect of signal skew and proposes a static skew scheme and a novel dynamic skew scheme. A fast algorithm is also suggested to determine the optimal skew value for the dynamic scheme. The experiment results show that the static scheme can significantly reduce jitter for low-speed buses but fails at high speed. By contrast, the dynamic scheme reduces jitter by about 44% for low-speed buses, reduces the jitter increment due to intersymbol interference by about 71%, and is effective at a higher bus rate. The proposed signal skew schemes require no additional routing overhead.
The globalization of the integrated circuit (IC) industry has raised concerns about hardware Trojans (HT), and there is an urgent need for efficient HT-detection methods of gate-level netlists. In this work, we propose an approach to detect Trojan-nodes at the gate level, based on graph learning. The proposed method does not require any golden model and can be easily integrated into the integrated circuits design flow. In addition, we further design a unioned GNN network to combine information from the input side, output side, and neighbor side of the directed graph to generate representative node embeddings. The experimental results show that it could achieve 93.4% in recall, 91.4% in F-measure, and 90.7% in precision on average across different designs, which outperforms the state-of-the-art HT detection methods.
This paper presents a configurable analog front-end (AFE) for low-power neural recording systems that is capable of the current-to-voltage converter, programmable gain, ultra-high input impedance, low-noise, and wide bandwidth. A 6-channel AFE consisting of 6 1-channel AFEs is also introduced in this paper. The proposed AFE is designed on a 180nm CMOS process for low noise and operates over a wide frequency range of 0.5Hz to 2.3kHz with low input-referred noise of 1.8µVrms and the maximal CMRR value of 180dB. The power consumption is 8.5µW per channel.
Since the single-sided linear induction motor not only produces thrust, but also produces vertical and transversal forces, if no specific control is applied, vertical and transversal forces can have a negative effect on the load propelled by the motor, especially in the application of the railway transit. Therefore, the best solution to the above issues is to independently control the vertical force or transversal force without changing the thrust in the motor. First, this paper presents a 3-D electromagnetic forces, i.e. thrust, vertical and transversal forces, decoupling strategy for the single-sided linear induction motor based on a novel equivalent circuit considering the longitudinal end effect and 3-D electromagnetic forces. Then, the slip-frequency calculator, thrust observer and thrust controller in the conventional vector control for induction motors are reconstructed, and a force decoupling controller is proposed. Finally, the simulation to verify the vector control with the force decoupling controller for the linear motor is performed by using a prototype motor which is used for railway transit.
This paper presents a new topology of asymmetric half bridge which can be called capacitor improved-asymmetric half bridge (CI-AHB) by adding a DC blocking capacitor adjacent to the leakage inductance for 135W type-c power delivery applications. Its detailed operation principle is shown and explained briefly. The clamping capacitor for CI-AHB stores energy when the main switch is on. Furthermore, the main switch stress for CI-AHB is low, which allows higher transformer ratio with lower voltage-stress synchronous rectifier (SR) FET. The efficiency of CI-AHB under different conditions is shown theoretically. These features help CI-AHB topology have better efficiency for over 100W level adaptor applications with power factor correction (PFC) function of constant dc bus voltage 380V input. Finally, a 135W commercial-level prototypes, PFC with CI-AHB (95.9%) was made (16.34w/inch3 with case) with both EMI and thermal pass. A state-of-the-art summary is finally given on efficiency and density of 135W power delivery (PD) adaptors.
This letter proposes a broadband piezoelectric energy harvesting (PEH) system based on sensorless direct resonance tuning (SDRT) technique. The PEH system consists of a frequency-tunable harvester, an energy harvesting (EH) subsystem and a control subsystem. The EH subsystem can transfer energy from the harvester to the storage. The control subsystem can detect the ambient vibration frequency and adjust the inherent frequency of the harvester using a servo motor to match the ambient vibration. Furthermore, the vibration frequency detection is based on the harvester itself rather than an additional sensor. Finally, the experimental results show that the prototyped PEH system can adjust its inherent frequency to achieve resonance in the range of 36-50Hz. In addition, the EH performance achieved by the proposed SDRT technique can reach at least 77.6% of the manual frequency tuning method.
This paper discusses issues of sampling circuits in analog-to-digital converter (ADC) and reviews some papers describing challenges for the solution to this fundamental issue of ADC. The energy consumption of the ADC is essentially determined by the capacitance. The peak current of the input signal sampling circuit is about 10 times larger than that of the continuous-time (CT) circuit and increases with resolution and conversion frequency. A CT-pipelined ADC using an analog delay circuit has been proposed to address this issue. Noise in the sampling circuit has been considered unavoidable and large capacitance has to be required to suppress the noise, but it has been shown that noise can be suppressed by placing an amplifier in front of the sampling circuit and changing the position of the sampling timing.
To detect a wide range of objects with one camera at once, real-time object detection in high-definition video is required in video artificial intelligence (AI) applications for edge/terminal, such as beyond-visual-line-of-sight (BVLOS) drone flight. Although various AI inference schemes for object detection (e.g., you-only-look-once (YOLO)) have been proposed, they typically have limitations on the input image size and thus need to shrink the input high-definition image down to the limit. This makes small objects collapsed and undetectable. This paper presents our proposal technology for solving this problem and its effective implementation, where multiple object detectors cooperate to detect small and large objects in high-definition video such as full HD and 4K.