An efficiency-enhanced fully integrated power amplifier (PA) for wireless local area networks (WLANs) was implemented based on the GaAs heterojunction bipolar transistor (HBT) process. A harmonic tuning network that can absorb the parasitic inductance of the bonding wires is proposed, which reduces the chip area significantly. The network provides nearly optimum fundamental and second harmonic impedances from 5.0 to 5.5GHz. Additionally, a novel adaptive bias circuit that corrects the AM-AM and AM-PM distortion and improve thermal stability at high input power was proposed. With a chip dimension of only 1.06mm², the PA achieves a gain of 31.1-31.6dB and saturated power of 29.9-30.3dBm with a peak power-added efficiency (PAE) of 49.3%-51.8% across 5.0-5.5GHz. The PA also shows an output power of 22.1dBm (EVM=-32dB) with 18.4% PAE under an 802.11ac MCS9 VHT160 test signal. In addition, the PA delivers 17.5dBm (EVM=-42dB) output power when tested with the 802.11ax MCS11 VHT160 signal at 5.25GHz.

When the photovoltaic system is put into use, some natural objects will cause partial shadows on the photovoltaic modules. And in this case, the output characteristics of the photovoltaic array will change from the original “single peak” to “multi-peak”, and the power of the photovoltaic array will have multiple extreme values, which will increase the difficulty of tracking the maximum power of the photovoltaic array. The traditional maximum power point tracking (MPPT) algorithm is no longer applicable. Most of them fall into the local maximum power and cannot find the global maximum power. Although the particle swarm optimization algorithm (PSO) has a certain ability to solve the global optimization problem, the standard particle swarm optimization algorithm can’t be regarded as a complete global optimization algorithm. Since the power output curve of the photovoltaic array is severely non-linear in the shaded situation, the standard particle swarm optimization algorithm may also fall into a local optimum and fail to find the global optimum. Compared with the standard particle swarm optimization algorithm, the particle swarm optimization algorithm with time-varying compression factor proposed in this paper can better balance the relationship between global search and local search, and can effectively avoid falling into the local optimal value and not finding it. To the correct maximum power point, while also increasing the speed of convergence. Comparing the method proposed in this paper with the standard particle swarm algorithm through experiments, the results show that the method proposed in this paper is of great significance for improving the efficiency of photovoltaic systems under partial shadow conditions.

The three-dimensional integration technology based on TSV can greatly improve the miniaturization of passive components. In this paper, a three-dimensional substrate integrated waveguide (SIW) filter suitable for 105GHz-110GHz is proposed. By using the coupling matrix synthesis method, a SIW filter is proposed with good high frequency performance and small volume. The results show that, the center frequency is 107GHz, the insertion loss is less than 1.5dB, the return loss is more than 20dB, and its physical size is only 0.7028×1.2428mm².

We designed and operated a 4-bit single-flux-quantum pulse-frequency modulator for bipolar D/A conversion. It was based on our previously-proposed “sum of selected bit sequence” configuration. Two functions, a synchronization scheme with a reference signal source and a complement number system for realization of bipolar output voltage, were implemented. A test circuit excluding the output analog stage (dual double-flux-quantum amplifier) was fabricated using a 10kA/cm² Nb/AlO_x/Nb integration process. The synchronization function was evaluated in terms of the average voltages, which agreed well with the expected values. The bipolar D/A conversion was successfully emulated by using the positive and negative output signals. The maximum over-biased input voltage was determined to be 230µV, of which the corresponding SFQ repetition frequency was 111GHz.

This paper proposed a digital synthesizable GMSK receiver baseband circuit for the Sub-GHz transceiver. The proposed digital baseband (DBB) circuit is composed of carrier recover, timing recovery, and demodulation blocks. An improved polarity Costas-loop with integration and dump (IP) is proposed for carrier frequency recovery. Timing recovery is based on the interpolation and Gardner error detection methods to determine the optimal sampling time. The proposed DBB is fabricated in 65nm CMOS technology. It realizes less than 10^-6 bit error rate(BER) at 14dB E_b/N₀ environment, with 314µW power consumption in the measurement.

Elliptic curve point multiplication (ECPM) is the most crucial operation in elliptic curve cryptography (ECC) and is vulnerable to side-channel attack (SCA). Based on power hiding technology, this paper proposes an SCA countermeasure for mutual power compensation of ECC logic units, which eliminates the difference between correct and incorrect keys by constructing a power-mapping model. The correlation power analysis (CPA) experiment for the second-highest key shows that this countermeasure increases the measurement to disclosure (MTD) by more than 1064 times with no performance overhead and loss of 19.9% energy and 6.0% LUT, 2.1% FF.