IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Volume 20, Issue 3
Displaying 1-4 of 4 articles from this issue
LETTER
  • Zhijie Chen, Xiaoyu Zhang, Yongkuo Ma, Xitong Liang, Xinyu Du, Peiyuan ...
    Article type: LETTER
    Subject area: Integrated circuits
    2023 Volume 20 Issue 3 Pages 20220515
    Published: February 10, 2023
    Released on J-STAGE: February 10, 2023
    Advance online publication: January 05, 2023
    JOURNAL FREE ACCESS

    This paper presents a 1.9-ps 8× phase interpolation time-to-digital converter (PI-TDC). This architecture enhances the resolution and conversion speed in cooperation with phase interpolation, high-frequency readout, and reset techniques. The prototype PI-TDC is designed in a 65-nm CMOS process with a 1-V power supply, achieving a 1.9-ps resolution at 2.5-GS/s. The simulated DNL is 0.85-LSB, and INL is 0.64-LSB. This PI-TDC is applied to a high-speed time-based analog-to-digital converter (TB-ADC) with a high-performance voltage-to-time converter (VTC) and the capacitance compensation self-calibration (CCS-CAL). The high-speed TB-ADC achieves 8-bit at 1.6-GS/s with PVT robustness while exhibiting a Walden FoM of 52.1-fJ/conv.-step.

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  • Kazuhiro Fujita
    Article type: LETTER
    Subject area: Electromagnetic theory
    2023 Volume 20 Issue 3 Pages 20220523
    Published: February 10, 2023
    Released on J-STAGE: February 10, 2023
    Advance online publication: December 26, 2022
    JOURNAL FREE ACCESS

    A physics-informed neural network method for solving electrodynamic interaction problems including a relativistic beam of charged particles in particle accelerators has been recently proposed. However, the method still has a limitation on modeling accelerator beams with discontinuous charge density. To remove this limitation, the scattered field formulation is introduced into this method. This approach allows us to model the field of discontinuous beam charge density such as point and ring charges. Its numerical error is shown to be smaller than that of the boundary element method. The presented approach is applied to three different vacuum chambers.

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  • Yan Ding, Xiaoxin Liang, Yuepeng Yan, Xiao Wang
    Article type: LETTER
    Subject area: Microwave and millimeter wave devices, circuits, and modules
    2023 Volume 20 Issue 3 Pages 20220526
    Published: February 10, 2023
    Released on J-STAGE: February 10, 2023
    Advance online publication: December 26, 2022
    JOURNAL FREE ACCESS

    A comprehensive study of air core recta-coax line (ARCL) based on MEMS surface micromachining technology is presented in this paper. The ARCL-to-semi-rectangular coaxial transmission line (SCL) ground-signal-ground (GSG) transition is proposed and designed for probe testing and integration with MMIC chips. To obtain the characteristic impedance of SCL, an equivalent model and theoretical derivation process is presented. In order to consider the effects of processing on performance, electrical effects of dielectric support strap parameters and potential fabrication issues including offset layers and over etching are investigated. For verification, the back-to-back GSG transition is fabricated and measured which has a low insertion loss of 0.13dB up to 50GHz, and a return loss better than -23dB within 5-50GHz. As an example, a demonstration of ARCL with GSG transition for MMIC chips integration is demonstrated.

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  • Kezhen Zhu, Shunyu Li, Guangyong Chu
    Article type: LETTER
    Subject area: Integrated circuits
    2023 Volume 20 Issue 3 Pages 20220527
    Published: February 10, 2023
    Released on J-STAGE: February 10, 2023
    Advance online publication: December 26, 2022
    JOURNAL FREE ACCESS

    This work proposes a RX front-end structure, which is used for channel equalization of 25Gb/s high-speed links. This design includes two parts, linear equalizer and decision feedback equalizer. Linear equalizer consists of the variable gain amplifier, the continuous-time linear equalizer and the output buffer, which provide 19dB peaking gain around the Nyquist frequency. The half-rate decision feedback equalizer with one speculative tap is cascaded after the buffer to eliminate residual inter-symbol interference. The circuit layout occupies an area of 0.005mm2 designed in 65nm CMOS, the power consumption of which is 96mW under 1.2V power supply. The design is used to equalize the FR-4 backplane channel, of which the insertion loss reaches 35dB at 12.5GHz. The result shows that both the voltage margin and time margin of the receiver signal reach 171mV and 0.61UI at the BER of 10-12, respectively.

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