Based on the vector fitting and the controlled sources in HSPICE, the delay extraction-based passive compact transmission-line (DEPACT) macromodeling for a transmission line above a lossy ground is presented. Combined with the equivalent sources of the external electromagnetic fields, the equivalent circuits about the scatted voltages and total voltages are proposed. The simulation results are compared with the inverse Fourier transform method and good agreement is obtained. At the same time, using this approach, the transient response for a transmission line above a lossy ground with nonlinear terminations excited by the external electromagnetic fields could be obtained easily and accurately.
This paper study the effect of redistributing the series resistance in the two-diode model of the PV module according to its physical components, considering the relation of each component to temperature variation. The proposed model divide the series resistance into two materials: metal and semiconductor, constructing the mathematical model for the overall model. The model is found to improve the accuracy in calculating the maximum power point with temperature variation, which contribute to the job of PV power converter designers and circuit simulator developers.
This paper presents a simple oscillator with 45 degrees phase shift between output signals. A Modified Current Differencing Unit (MCDU) was used for its design. The MCDU offers controllability of input resistances of current inputs and controllability of current gains. These features are not available together in the standard current differencing unit and it limits usability in some applications. The proposed oscillator allows linear electronic control of oscillation frequency and independent control of condition of oscillation with simple implementation of amplitude stabilization. The PSpice simulations and measurements in laboratory with manufactured behavioral emulator of the MCDU confirmed the expected features of the solution.
A novel and simple solution for adjusting dead time in high speed DC-DC converters is proposed. The usual dead time adjustment of DC-DC converters through feedback control has limited speed. For the high speed converters extra circuitry and delays in the feedback should be minimized. A 240 MHz DC-DC converter with the presented dead time circuit is designed on low-voltage fast CMOS process.
A single-layer broadband transition between air-filled rectangular waveguide (ARW) and substrate integrated waveguide (SIW) operating in W band is proposed. Voltage and current probes are employed to implement the transition. A back-to-back prototype of the proposed transition is designed, fabricated, and measured. Good agreement of the simulated and measured results are obtained. From 80.2 to 98.1 GHz, the measured results show that the insertion loss (IL) is less than 1 dB and the return loss (RL) is better than 10 dB.
As the technological advances in mobile display is focusing on thinner and wider structures, capacitive touch recognition suffers from ever-increasing display noise. Realizing reliable touch recognition in thin displays requires a way to remove display noise. We observed that display noise is evident in various patterns and amplitudes according to the display image. In order to remove noise, we applied non-inverse signals and inverse signals across two data frames, in accordance with the periodicity of the noise. With all other conditions remaining the same, the proposed method showed higher signal-to-noise ratio (SNR) for all display noise patterns compared to existing methods. The proposed method showed a SNR that was averagely 5.39 dB higher than the SNR of the existing method. The results shows that the display noise was removed effectively.
In this letter we present a mechanism to generate subnets for the tasks running on network-on-chip, gaining better performance in broadcast. The present results show that subnetting supplies apparent improvement in the performance of on-chip communications mixed with both unicast and broadcast on manycore processors. However, due to unpredictable task submitting sequence, the applications coming following will be mapped into subnets with different irregular topologies, in which the performance of communications will be restricted by topologies apparently. We propose a flexible subnetting mechanism to build subnet for specified cores on manycore processor to address this problem. Improved hardware support also requires fewer circuits in router design. In this letter, both the unicast and the broadcast traffics are considered. Experiments show that about 10% improvement in performance over the traditional subnetting method is gained on average.