The brushless dc motor (BLDCM) suffers the prominent drawback of torque ripple, a novel hybrid control strategy based on dc link voltage control and fuzzy PID controller is proposed to suppress torque ripple of BLDCM. The circuit topology contains a power factor correction (PFC) buck converter and a inverter. The PFC buck converter reduces the commutation torque ripple by controlling dc link voltage, the inverter using fuzzy PID controller and pulse width modulation (PWM) technique supplies the appropriate current in the conduction region. The experimental results show the proposed strategy suppresses torque ripple efficiently with the function of power factor correction.
Pre-bond TSV test plays a vital role in improving the yield and reducing the cost of 3D ICs. In this paper, we proposed an effective test structure and flow for pre-bond TSV test. In the test structure, the resistor-capacitor parameter related to a specific TSV can be reflected by oscillations with high accuracy. By analyzing the period variations between two oscillations generated in successive test steps, the proposed test scheme enables quick detection of faulty TSVs. Experimental results have demonstrated the effectiveness of the proposed pre-bond TSV test scheme.
This paper proposes an efficient full-parallel real-time blind calibration algorithm for frequency response mismatches in two-channel time-interleaved analog-to-digital converters (TI-ADCs). To make the algorithm compatible for high-speed and real-time scenarios, the algorithm is designed with full-parallel structure, where all the filters adopted in the algorithm are realized by using fast FIR algorithm (FFA). In order to reduce the computational complexity, we present a downsampling signed-FxLMS method to estimate the mismatch parameters, which can substantially save the resource consumption. Furthermore, the proposed calibration algorithm can provide low latency due to the utilization of FFA. Finally, we demonstrate the performance and efficiency of the proposed algorithm through simulations.
A double-Orbital-Angular-Momentum (OAM)-mode microstrip antenna is designed, simulated, fabricated and measured, which generates OAM with mode number l = 2 and 3 on 5 GHz by two resistor loaded microstrip rings respectively. For existing OAM antennas, structures like circular array, parabolic reflector and electromagnetic meta-surface are widely adopted, which are electrically large and hard to be integrated. However, the proposed antenna has a compact size and a low profile, which can be integrated in RF circuit as a component. To solve the problem of low gain in microstrip OAM antenna, parameters are optimised and a top dielectric layer is adopted, and its measured peak gain reaches 1.5 dB for l = 2 and 1.8 dB for l = 3. The measured frequency band, on which a near field vortex phase is observed and orbital angular momentum is generated, is 4.65–5.25 GHz for l = 2, and 4.5–5.2 GHz for l = 3. Besides, this antenna can multiplex more OAM modes by adopting more microstrip rings.
A W-band low-sidelobe high-gain planar integrated monopulse array antenna is presented in this paper. The antenna comprises two PCB layers, one is 16 × 41 units series-fed patch arrays and the other is a low-loss slot feeding network based on substrate integrated waveguide (SIW) technology. A W-band waveguide magic T is used in this design in order to get sum and difference beams in horizontal azimuth. Such a two-layer integrated array antenna can be fabricated with standard multi-layer PCB process. The maximal measured gain of the proposed antenna is 26.63 dB, while the maximal null-depth is measured to be is −32.1 dB. Quarter-wavelength transformers are used to achieve Taylor’s amplitude distribution in order to suppress sidelobe. The measured sidelobe level in the vertical plane is within the range of −25.7 dB to −26.4 dB. The designed monopulse array antenna has great practical value in W band portable radar.
This paper presents the hardware architecture and VLSI implementations of a PCANet-based object detector. The proposed PCANet model, cascaded with a linear support vector machine, can achieve better classification performance than traditional handcrafted computer vision methods, yet it is significantly more power efficient than multi-layer convolutional neural networks. The proposed pipeline hardware architecture, when implemented using Synopsys 32 nm process technology, results in 27.4 fps while processing 1080P, with only 0.5 watt power consumption. Targeted for the application of advanced driver assistance system, the proposed design is evaluated on road marking and traffic light dataset with an accuracy result of 96.8% and 93.1% respectively. Therefore, the proposed VLSI implementation of PCANet algorithm provides a high-throughput and power-efficient solution for object detection applications.
Vienna rectifiers are unidirectional three-level boost rectifiers used in extensive industrial applications. Much effort has been devoted to study the control strategies for Vienna rectifier. This paper introduces the manipulation principles and operation steps of model predictive control strategy based on optimal switching sequence principle. In order to address several issues of the conventional methods, an improved model predictive control strategy has been proposed to regulate the ac currents and neutral point voltage deviation. The proposed strategy has been validated by experiments. The consequences show that the proposed strategy can achieve accurate prediction especially during neutral point voltage unbalance by dealing with constraints and provide excellent performance in dynamic property and stability.
An active rectifier in 6.78 MHz resonant-coupling wireless power receivers for space-limited portable and wearable applications is presented. To improve the power efficiency and reduce the die area, a fully NMOS transistor-based active rectifier with a unified delay-locked loop (DLL) controller is proposed. The proposed rectifier has been implemented in a 0.35 µm CMOS technology with a die area of 0.612 mm2. The measured peak and minimum power efficiency within the power range of 80 mw to 440 mW are 91.8% and 69.6%, respectively.
The inhibition of common-mode leakage current is the key problem to be solved in non-isolated photovoltaic grid-connected inverter (NPGCI). To eliminate the common-mode leakage current of dual-buck grid-connected inverter, a novel non-isolated dual-buck photovoltaic grid-connected inverter (NDPGCI) topology is proposed in this paper. Meanwhile, a unipolar sinusoidal pulse width modulation (USPWM) strategy that can make the common-mode voltage constant is presented. Then, operating modes and common-mode leakage current of NDPGCI are analyzed, which show that NDPGCI modulated by USPWM has advantages of no shoot-through problem, three-level output characteristic and high reliability, as well as common-mode leakage current elimination. Finally, the experimental results verified the correctness of NDPGCI.
A dual-band circularly polarized (CP) antenna with wide half power beamwidths (HPBWs) for compass navigation satellite system (CNSS) applications is proposed in this paper. The CP radiation is realized by feeding four sequentially rotated U-shape patches shorted to the ground at both ends of them with a 90° phase difference feeding network. Loading four parasitic arc-shape patches with one end shorted to the ground provides the dual-band CP operation. Experimental results show that the proposed antenna exhibits two overlapped impedance and axial ratio relative bandwidth of 2.8% and 3.3%. Wide HPBWs of over 122° at center frequencies (1.268 and 1.561 GHz) of the CNSS-2 B3 and B1 bands are obtained. With these good performances, the antenna can be a good candidate for CNSS applications.
Task allocation is a traditional and complicated problem for a system with many peripherals. Normal allocation methodology focuses on fuzzy data transfer but is unable to analyze some specific experimental statistics and does not improve system performance. Data Director (DD) is an innovative packet-based manager, is comprised of Data Index (DI) and Packet Direct Memory Access (PDMA) and realizes the enhanced data transfer in a complex system. This paper presents an improved task allocation model to enhance data transfer in a task-based model with three different allocation methodologies. The experimental results for the optimization allocations show that the proposed methodologies reduce the delay of transfer differently due to the schedule costs in these cases.
A dispersive transmission line resonator can work in conjunction with a resistor, inductor and capacitor (RLC) circuit that can be configured to design a negative group delay (NGD) network. Furthermore, an NGD can be used as a non-Foster circuit (NFC), which can be implemented to enhance the bandwidth of some radio frequency (RF) modules. This paper discusses a dispersive short-circuit transmission line resonator as a NGD network that is used to design a passive negative shunt inductance circuit by controlling the dispersive medium of the transmission line resonator. The advantages of designing an inductance circuit this way are overcoming the power consumption problem of conventional NFCs and reducing the loss parameter caused by passive NFCs that was designed using RLC resonators.
A SAW-less receiver front-end with an active adjustable feedback loop for blocker-filtering is presented. By simply tuning the gain of loop amplifier, the −3 dB intermediate frequency (IF) bandwidth can be configured from 1 to 15 MHz continuously only using 46 pF capacitors. Moreover, the blocker current at low-noise amplifier (LNA) output can be effectively absorbed by the auxiliary capacitor and the loop amplifier buffer. The front-end operates from 0.1 to 2.5 GHz with maximal out-of-band rejection of 38 dB at 100 MHz offset frequency and it achieves 7-dBm out-of-band input third intercept point (IIP3). The design is implemented in 0.13 µm BiCMOS process.
In this paper, we present a general cross-phase modulation (XPM) model based on the Volterra series transfer function (VSTF) method in hybrid coherent QPSK/OOK wavelength division multiplexed (WDM) systems. The general model can entirely describe XPM effects in dispersion management (DM) fiber links. Normalized square deviation (NSD) is employed to test the precision of our model. The results show that we can achieve NSD less than 10−3 as launched peak power below 4 dBm/ch in DM fiber links. The accuracy of our model is sufficient for current hybrid coherent QPSK/OOK WDM systems. Based on our XPM model, the statistical properties of XPM effects can be predicted at the end of DM fiber links, the launched optical power can be optimized to achieve the optimum system performance, and the analytical expression of bit error rate (BER) can be obtained to predict the performance of QPSK channel coherent receiver. We present comprehensive analysis regarding the applications of our model through both theoretical analysis and Monte Carlo (MC) simulation. The good consistence between MC simulation and analytical result validates our theoretical derivation. Our results will be very useful for the design of hybrid coherent QPSK/OOK WDM systems without resorting to time-consuming numerical simulation.
A compact filtering UWB antenna with band-notched function is proposed. The proposed antenna mainly consists a stepped impedance resonator feeding line with low-pass characteristic at the top of the dielectric substrate and two slots at the bottom. The stepped impedance resonator is used to enhance the upper band-edge selectivity, and the narrow slot near the stepped slot is employed to improve the lower band-edge selectivity. What’s more, two microstrip lines paralleling to the feeding line are located at the end of the slot, which can generate the notch band by controlling the length of the current path in two microstrip lines. Compared with the traditional antennas, the proposed antenna is not only smaller in size, but also has better suppression of the in-band and out-of-band interference signals in function.
A novel planar E-plane waveguide power divider with extra 180° phase difference and full bandwidth is proposed. It is basically an E-plane waveguide T-junction power divider with its input port rotated around its axis by 90° and arranged symmetrically to form a planar structure. A sample power divider is then designed, fabricated and tested. The test results indicate that, in a relative bandwidth of 40%, the reflection coefficient is lower than −20 dB and the extra phase difference between the two output ports is 180° within an error of ±1.5°.
This paper presents high-efficiency class-E/F3 power amplifiers with extended maximum operating frequency (fmax) using a novel method of a transmission-line compensation circuit (TLCC). Theoretical analysis is presented in order to obtain circuit component values, which compensate the excess output capacitance Cx and satisfy the required impedances of the class-E/F3 power amplifiers at the fundamental frequency and harmonics. The proposed circuit, whose fmax is 4 times higher than the conventional structure, has been designed, fabricated, and measured. Besides, high-performance results with the output power of 40.3 dBm, drain efficiency of 82.9% have been achieved.
This paper presents a Li-ion battery monitoring and protection IC suitable for monitoring 12 battery cells for electric vehicles (EVs). A two-wire, transformer based, isolated interface is proposed to provide the interface for the cascaded ICs. The interface uses the “balanced” two-wire technology and encodes the four SPI signals into DC-free pulse that can be coupled by a transformer, which features high-speed, low electromagnetic interference (EMI), and reliable data transmission. The IC was fabricated in a 0.18 µm, 60 V BCD process, with a total chip area of 4.4 × 3.6 mm2. Measurement results show that the proposed interface can achieve a data rate up to 1 Mbps. Meanwhile, the measured current consumption is less than 45 µA in sleeping mode.