We experimentally demonstrated ultimately phase-noise tolerant 20-Gbps QPSK-homodyne transmission over 160km using a 3-nm spectrum-sliced ASE light source. We applied an optical phase noise cancellation technique based on self-homodyne detection using a polarization-multiplexed pilot-carrier, which included identical phase noise to that of modulated optical signal. BER of less than 1 × 10-6 after the transmission was achieved. We also characterized DGD and dispersion tolerances. To the author's best knowledge, this is the first experimental demonstration of multi-bit-per-symbol modulation/demodulation using an incoherent ASE light source.
In this paper, current mirror based Current Amplifiers (CAs) with differential structure are simulated and compared by PSPICE program using HP 0.8µm CMOS process parameters. The proposed CA designs are based on four well-known current mirror structures such as wilson, improved wilson, cascode, and modified cascode current mirrors. The comparison parameters are power dissipation, bias current, input resistance, output resistance, and cut-off frequency obtained from DC transfer characteristics and AC frequency response of proposed circuits.
A new partial transmit sequence (PTS) scheme that uses the amount of OFDM signal's nonlinear distortion to be caused by high power amplifier (HPA) is proposed. However, since it may not be practical to know in prior the exact characteristics of HPA, a new measure which is called adaptive nonlinear estimator (ANE), is achieved to estimate OFDM signals after the nonlinear HPA by applying gradient algorithm. According to combining ANE and iterative PTS (I-PTS) with simple subblock combining method, the proposed scheme can transmit the OFDM signal with minimum nonlinear distortion among OFDM signal candidates. From the results, it can be seen that a proposed scheme based-iterative PTS can achieve better performance with lower computational complexity when compared to that of conventional PTS.
A new topology to design low-phase-noise low-power quadrature voltage-controlled-oscillator (QVCO) is proposed. The proposed topology is based on using a dynamic transistor biasing scheme in a typical voltage-controlled-oscillator (VCO). This method modifies the equivalent impulse-sensitivity-function (ISF) of oscillator to reduce the oscillator sensitivity to noise sources and as a result reducing the oscillator phase noise. A 1.8GHz, 1.8v designed QVCO with 0.18u CMOS technology based on the proposed topology shows a phase noise of -134dBc/Hz at 1MHz offset frequency from the carrier.