In this letter, an experiment is designed to validate the soft ESD failure. The capacitive transimpedance amplifier (CTIA) circuit used in the hybrid integrated infrared sensor is chosen as the prototype for its characteristic of ESD-protection-device-free. The experiments show that under the ESD event with the rising pulse voltage, the induced leakage current in the CTIA circuit increase as well. As the pulse voltage exceeds one certain threshold point, the CTIA circuit fails to work anymore. The EMMI measurement helps to demonstrate the existence and location of the leakage path.
This paper presents an all-digital half-rate referenceless CDR with a single direction frequency acquisition achieved. Thanks to asymmetric binary phase detector (ABPD), compared with existed inverse alexander phase detector (IAPD), we changed the input-output characteristic to enable accumulated phase error point in the same direction when frequency error happens while the output of IAPD has no directivity. Once the frequency of the digital controlled oscillator (DCO) enters the pull-in range of the CDR loop, the phase is automatically locked. To improve jitter tolerance (JTOL) performance further, IAPD logic is enabled, and ABPD is disabled after locking. The prototype was implemented in a 28 nm low power CMOS process with a data rate tracking range of 9–11 Gb/s. The measured JTOL is 0.35 UI at high frequency with PRBS31 input data pattern.
The tunnel field-effect transistor (TFET) is one of the promising transistors which is expected to replace some complementary metal-oxide semiconductor (CMOS) circuits. Here, we apply a SPICE simulation of a Si TFET using high-K gate insulator to a simple circuit of 32-kHz crystal oscillator and compare the power consumption of Si TFET with conventional CMOSs calculated from the predictive transistor model (PTM). We considered L = 65-nm and L = 90-nm devices based on a table model whose values are derived from technology computer aided design (TCAD) calculations. We show that the power consumptions of TFETs are about 22.3%∼38.6% lower than those of CMOSs for L = 65-nm devices, and we show the 13.6%∼36.1% lower power consumption of TFETs for L = 90-nm devices.
Wavelength division multiplexing (WDM) mesh-based optical network on chip (ONoC) have recently received considerable attention due to their regular topology and higher throughput. However, available wavelengths are finite resources. Thus, to minimize the number of wavelengths, this letter proposes an efficient WDM mesh-based ONoC mapping approach, which is based on a particle swarm optimization algorithm. Experimental results reveal that our proposal has a positive effect in minimizing the number of wavelengths needed compared to random mapping. The tradeoff between the number of wavelengths and the network size is also investigated, and it is found that increasing the network size can reduce the number of wavelengths needed. Meanwhile, the experiments show that the structure has better network performance and less communication resource utilization.
An accurate programmable average inductor current limit method for buck DC-DC converters with peak current mode (PCM) control is presented. A Gm-C filter is used to sense the voltage drop across a current sensing resistor in series with the inductor. Then, the voltage drop is converted into a current signal by a voltage-to-current (V2I) converter. The converted current signal is superposed on the output of the error amplifier to adjust the peak inductor current. The buck converter has been designed with 0.18 µm BCD process. The current limit value is designed 1 A/2 A for the sensing resistor of 50 mΩ/25 mΩ, respectively. When the the equivalent load resistance steps from 10 Ω to 2.5 Ω/1.67 Ω, the simulation results show that the average inductor current increases from 500 mA to 0.9 A/1.8 A for the sensing resistor of 50 mΩ/25 mΩ, respectively.