IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Volume 12, Issue 23
Displaying 1-16 of 16 articles from this issue
LETTER
  • Daying Sun, Shen Xu, Weifeng Sun, Shengli Lu
    Article type: LETTER
    Subject area: Integrated circuits
    2015 Volume 12 Issue 23 Pages 20150726
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 09, 2015
    JOURNAL FREE ACCESS
    A new digital predictive control strategy for a single-phase boost power factor correction (PFC) converter is presented in this paper, to reduce the harmonic distortion and improve the dynamic response. Based on the converter circuit structure, the values of output voltage and inductor current of next switching cycle are predicted in advance. The steady-state algorithm and the dynamic-state algorithm are implemented respectively, the duty cycle is calculated only via the predicted output voltage and inductor current values during the steady process, and the optimized duty cycle is predicted during the dynamic process, to improve the characters of PFC converter. The single-phase boost PFC converter with the proposed digital predictive control strategy has been implemented via the field programmable gate array (FPGA). The experimental results indicate that the proposed digital control strategy can improve the power factor and the dynamic response of PFC converter simultaneously.
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  • Xin Wang, Hsien-Shun Wu, Ching-Kuang Tzuang
    Article type: LETTER
    Subject area: Microwave and millimeter wave devices, circuits, and systems
    2015 Volume 12 Issue 23 Pages 20150797
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 09, 2015
    JOURNAL FREE ACCESS
    This paper presents a left-handed transmission line (LH TL) based dual-band resonator to implement the dual-band filter. The proposed resonator consists of one uniform LH TL and one right-handed transmission line (RH TL) to produce three transmission zeros at 52 GHz, 267 GHz, and 531 GHz. The perforated ground plane is applied to extend the operating bandwidth of the LH TL for covering the full bandwidth of the dual-band filter. A CMOS prototype is designed based on the proposed resonator, and measured through the on-wafer measurements. Both simulated and the measured results confirm the insertion-losses of 1.8 dB and 2.4 dB of two passbands at 186 GHz and 420 GHz. The statistic shows the total length of the proposed resonator is about 0.038 λg at 52 GHz.
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  • Zhiping Wang, Yunxiang Xie, Yunshou Mao, Chi Xu
    Article type: LETTER
    Subject area: Electronic instrumentation and control
    2015 Volume 12 Issue 23 Pages 20150818
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 09, 2015
    JOURNAL FREE ACCESS
    An input filter is indispensable for a matrix rectifier (MR), since it can improve the input current quality and reduce the ac supply voltage distortion. However the characteristics of input filter reduce the input power factor (IPF). Moreover, the unbalanced ac supply voltage could disturb dc output voltage. Consequently, this paper provides a novel approach to achieve both tight dc output voltage and unity IPF at the main ac power supply by applying circuit DQ transformation to MR. Analyzing the DQ model of MR, sliding mode control (SMC) based on reaching law is used to achieve tight dc output voltage regulation of MR and PI control is applied to control the q-axis current to be zero. Finally, simulation and experiment results are shown to verify the effectiveness of the control scheme proposed in this paper.
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  • Hyun-Seung Seo, Ji-hoon Park, Bai-Sun Kong
    Article type: LETTER
    Subject area: Integrated circuits
    2015 Volume 12 Issue 23 Pages 20150828
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 09, 2015
    JOURNAL FREE ACCESS
    A novel ring oscillator is proposed for ultra-low-voltage application. The proposed ring oscillator utilizes the voltage bootstrapping to enhance the oscillation speed at near- and sub-threshold voltage regions. The delay cell for the proposed oscillator is configured with feedforward inputs coming from multiple previous stages for further enhancing the speed with low power consumption. The proposed ring oscillator was designed in a 65-nm CMOS process. Evaluation results indicate that the proposed delay cell has up to 50.8% lower latency with up to 23.5% less power consumption for the supply voltage ranging from 0.35 V to 0.6 V. They also indicated that the oscillation frequency of the proposed ring oscillator was improved by 44.5%∼103.3% as compared to the conventional bootstrapped ring oscillator. For providing the same oscillation frequency, the proposed ring oscillator has 22.6% less power consumption.
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  • Peng Liu, Zhiqiang You, Jishun Kuang, Zhipeng Hu, Weizheng Wang
    Article type: LETTER
    Subject area: Integrated circuits
    2015 Volume 12 Issue 23 Pages 20150839
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 13, 2015
    JOURNAL FREE ACCESS
    As an attractive option of future non-volatile memories (NVM), resistive random access memory (RRAM) has attracted more attentions. Due to its high density and low power, one memristor (1R) crossbar is a dominant RRAM structure. In this paper, we propose a logic operation-based design for testability (DFT) architecture for 1R crossbar testing. In this architecture, memristor-aided logic (MAGIC) NOR gates are embedded to check whether all the cells in the crossbar are 0 s or not at a time. A March-like test algorithm is also presented for the proposed architecture, which covers all modeled faults. The test time is reduced drastically with a little area overhead.
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  • Jingyan Xu, Shuming Chen, Pengcheng Huang, Peipei Hao, Ruiqiang Song, ...
    Article type: LETTER
    Subject area: Integrated circuits
    2015 Volume 12 Issue 23 Pages 20150849
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 19, 2015
    JOURNAL FREE ACCESS
    In this paper, the propagation of SET in dynamic CMOS cascade circuits is studied. Based on the domino logic buffer chain and the static inverter chain, the SET propagation was simulated by large amount of random singe event current transient injecting in spice simulation. It can be found that the propagation probability of SET in the domino logic buffer chain is 15.7% of that in the static inverter chain. With the simulation results, it can be deduced that in other logic gate cascade structures, the propagation probability of SET in dynamic CMOS cascade circuits is reduced significantly compared with that in the static circuits.
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  • Quang-Thang Duong, Takuya Maekawa, Takeshi Higashino, Minoru Okada
    Article type: LETTER
    Subject area: Electronic instrumentation and control
    2015 Volume 12 Issue 23 Pages 20150854
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 09, 2015
    JOURNAL FREE ACCESS
    This paper proposes a dynamic charging system using hybrid inductively-capacitively coupled parallel line feeder with receiver-side load control to guarantee a stable target power profile for mobile receiver. Inductive- or capacitive-coupling system suffers from nulls in power profile due to impact of standing waves when operating in the HF band. Because current and voltage standing waves are out of phase by 90 degrees, hybrid inductive-capacitive coupling is employed to remove nulls in the power profile. Furthermore, load is iteratively controlled at the receiver until reaching the target power. Analysis and experimental results show that the load control is notification-free and fast converging compared to ordinary vehicle speed.
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  • Chunmei Hu, Shuming Chen, Pengcheng Huang, Yao Liu, Jianjun Chen
    Article type: LETTER
    Subject area: Integrated circuits
    2015 Volume 12 Issue 23 Pages 20150860
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 19, 2015
    JOURNAL FREE ACCESS
    The radiation induced soft error of dynamic comparator for a 65 nm CMOS technology in 5 Gbps half-rate SerDes (serializer and deserializer) is evaluated using three-dimensional TCAD mixed-mode simulation. The sensitivity of MOSFET is simulated combined with the polarity of differential inputs and the working phases. Four types of single-event (SE) response are classified and the sensitivity grades are summarized. Our research presents that the NMOS of the cross-coupled inverter is the most sensitive.
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  • Yihong Zhou, Haiyang Wang, Jiayin Li, Haiyan Jin
    Article type: LETTER
    Subject area: Microwave and millimeter wave devices, circuits, and systems
    2015 Volume 12 Issue 23 Pages 20150861
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 19, 2015
    JOURNAL FREE ACCESS
    A novel wideband four-way divider/combiner based on substrate integrated waveguide (SIW) and double-layer finline is presented. This divider/combiner designed at 29–40 GHz is mainly composed of the double-layer finline transition from waveguide to SIW and the double-microstrip transition from SIW to microstrip. These transitions feature the function of power divider/combiner, as well as the function of transition. The measured power-combining efficiency of this circuit at 35.6 GHz is 86%, and the combining efficiency is higher than 75% at 29–40 GHz.
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  • Hai Yan, Lei Li, Qyu Zhang
    Article type: LETTER
    Subject area: Integrated circuits
    2015 Volume 12 Issue 23 Pages 20150870
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 06, 2015
    JOURNAL FREE ACCESS
    In this express, an optimized architecture for modulo (2n − 2p + 1) multipliers is proposed. Compared with the state-of-art, synthesized results demonstrate that the proposed multipliers can achieve an average delay savings of about 11.8%. With the increase of n, the average delay savings also increases remarkably.
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  • Cong Liu, Xin-quan Lai, Han-xiao Du
    Article type: LETTER
    Subject area: Electron devices, circuits, and systems
    2015 Volume 12 Issue 23 Pages 20150873
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 19, 2015
    JOURNAL FREE ACCESS
    An AC-mains voltage compensation technology for variable load multiple-string LED drivers is presented. By forming a closed loop control of the multiple reference voltages and by introducing an external compensation resistor, the output luminance is well compensated in case of line voltage variations. The proposed technology along with the accompanied AC-direct multiple-string LED driver were integrated in an 1 µm trench-isolated BCD process and tested with a three-string prototype. With very few external components used, the line regulation character of the LED driver is highly optimized by the proposed technology. The experimental results show that within 15% AC-mains voltage tolerance, the output luminance deviation is restrained to 2.0% (1.5%) under 10 W, 110 V/AC (220 V/AC), 50 Hz conditions.
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  • Toshihiko Hirooka, Keisuke Kasai, Yixin Wang, Masataka Nakazawa, Masak ...
    Article type: LETTER
    Subject area: Fiber optics, Microwave photonics, Optical interconnection, Photonic signal processing, Photonic integration and systems
    2015 Volume 12 Issue 23 Pages 20150884
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 19, 2015
    JOURNAL FREE ACCESS
    We demonstrate the add/drop operation and transmission of 120 Gbit/s (10 Gsymbol/s) polarization-multiplexed (PDM) 64 QAM digital coherent signals in a deployed ROADM network. By equalizing waveform distortions at the ROADM node with an FIR filter, the QAM signal was successfully add/drop-multiplexed, and transmitted over a 50 km ring network testbed with neighboring 9 × 10 Gbit/s OOK WDM data. This indicates the applicability of digital coherent systems to the deployed ROADM network based on 10 Gbit/s OOK, and its upgradability to 120 Gbit/s PDM-64 QAM.
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  • Zunkai Huang, Li Tian, Qi Zhang, Hui Wang, Songlin Feng
    Article type: LETTER
    Subject area: Electronic displays
    2015 Volume 12 Issue 23 Pages 20150897
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 24, 2015
    JOURNAL FREE ACCESS
    An optimized compact-sized 10-bit DAC with one-voltage selector for AMOLED column driver ICs is proposed in this paper. By rearranging the architecture of the switch-capacitor in the proposed design, the number of decoder switches is cut in half. In addition, a compact 8-bit two-stage DAC with two-voltage selector is also presented. The simulation and experiment results show that the column drivers adopting the compact 8-bit DAC and 10-bit DAC occupy only 53.7% and 76.3% of the area required for the driver adopting the conventional 8-bit R-DAC. The measured DNL/INL is 0.44LSB/0.68LSB for the 8-bit DAC and 0.126/0.256LSB for the 10-bit DAC, respectively. Moreover, settling time within 6.43 µs is achieved under 1.5 kΩ-resistance and 100 pF-capacitance load, hence the proposed column driver is suitable for Full-HD AMOLED displays.
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  • Lu Zhijian, Pan Xingpeng, Zhou Jianjun
    Article type: LETTER
    Subject area: Integrated circuits
    2015 Volume 12 Issue 23 Pages 20150898
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 19, 2015
    JOURNAL FREE ACCESS
    A novel edge voltage (EV) quantizer with digital-intensive implementation is proposed to detect DC voltage, peak-to-peak magnitude, and frequency of low-frequency simple waveforms (e.g. sinusoidal). The proposed EV quantizer does not need the area-consuming low pass filter. It can be implemented using digital-intensive circuits with little computing complexity, thanks to the simple detection algorithm. A successive approximation register (SAR) version of the EV quantizer was integrated in a monolithic satellite low noise block (LNB) IC in a 65 nm CMOS process to detect low-frequency control signals. And the measurement results validate that the EV quantizer enables low-cost operation for detection of low-frequency simple waveforms.
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  • Jiajun Hu, Houpeng Chen, Qian Wang, Xi Li, Xi Fan, Xiaoyun Li, Yu Lei, ...
    Article type: LETTER
    Subject area: Integrated circuits
    2015 Volume 12 Issue 23 Pages 20150901
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 19, 2015
    JOURNAL FREE ACCESS
    A novel primary side current sensing strategy is presented in this paper, which is especially suitable for the primary side controlled high power factor single-stage flyback LED controller. In order to avoid the constant-current regulation accuracy error caused by electromagnetic interference (EMI) issue, the proposed current sensing technique utilizes the switched-capacitor interleaved sample and hold circuit to obtain the middle point of the primary side current sensing period. The single-stage LED driver utilizing the proposed current sensing scheme has been implemented in CZ6H 0.35 um standard CMOS process, simulation results show that load regulation and line regulation accuracy can be improved greatly.
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  • Yu Guo, Kexue Sun, Xiaozhou Liu, Haodong Wu, Guojun Wang, Guann-Pyng L ...
    Article type: LETTER
    Subject area: Microwave and millimeter wave devices, circuits, and systems
    2015 Volume 12 Issue 23 Pages 20150931
    Published: 2015
    Released on J-STAGE: December 10, 2015
    Advance online publication: November 24, 2015
    JOURNAL FREE ACCESS
    A novel design of a configurable dual-band EBG (Electromagnetic Bandgap) bandpass filter is proposed. The EBG filter is manufactured by a conventional 2-layer PCB process in RO4350 substrate with surface mounted lumped capacitors. Specific working frequency of each band of the filter can be selected on demand by adjusting the value of corresponding capacitors, while the filter’s performance and compact design is not compromised. The experimental results show a filter with size of 28.00 × 28.00 × 1.52 mm3 in PCB achieving performance of insertion loss of 2.18 dB, 2.24 dB; return loss of 14.5 dB, 11.3 dB at 2.30 GHz, 4.1 GHz respectively. The filter has band to band isolation better than 48.0 dB and spurious free region up to 9.00 GHz.
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