On the basis of the systematic study of stitching techniques, a large area, 28.3 mm × 38.8 mm, 42 Mega pixels CMOS Imaging Sensor (CIS) had been demonstrated on 12 inch silicon wafer in a 0.055 µm CMOS process. By scanning a reticle across a wafer of silicon, smaller arrays can be stitched together to construct larger area sensors. Meanwhile, in order to verify the feasibility and capability of stitching, a 203 mm × 179 mm, 1.8 Billion pixels CIS was also created without any performance deficiency.
This paper proposes a high-speed multiband filtered-orthogonal frequency division multiplexing (F-OFDM) signal transmission over a seamless fiber-millimeter-wave (MMW) system at 92.5 GHz. The system employs a frequency and phase stabilized optical MMW signal generation at the transmitter and a simple direct detection at the receiver. We confirm a successful transmission of multiband F-OFDM signal over a seamless 20-km single mode fiber (SMF) and 1-m 92.5-GHz wireless system. Compared to the single-band and multiband OFDM signal transmission, the proposed system can provide a much better performance, particularly at the edges of each band.
The paper presents a new voltage-mode universal biquadratic filter and a new quadrature oscillator using two current-feedback amplifiers (CFAs) with two capacitors and three resistors. The proposed circuit can work as both a voltage-mode universal biquadratic filter and a quadrature oscillator without changing the circuit configuration. As a voltage-mode universal biquadratic filter, the proposed circuit can be easily realized all five generic filtering functions by selecting three different input voltage signals. The proposed filter allows the orthogonal controllability of the quality factor and the resonance angular frequency. If there is no input voltage signal, the proposed configuration can work as a quadrature oscillator without changing the circuit topology. This proposed topology provides two quadrature voltage outputs. The oscillation condition and oscillation frequency are also independent adjustability. The experimental results show that the new voltage-mode universal biquadratic filter and quadrature oscillator are feasible.
The global register files (GRF) seriously affect performance and area of coarse-grained reconfigurable cryptographic processor (CGRCP). By studying the direct factors affecting the performance of GRF and the characteristics of block cipher algorithms implemented on CGRCP, a distributed whole interconnected global register files (DWI-GRF) was proposed. Compared with other GRF architecture with 14 mainstream block cipher algorithms as the experimental benchmarks, the average performance improved up to 17.24%∼230.67% and average area efficiency improved from 36.37%∼95.59% respectively.
This article reports a modified parallel-circuit class-E power amplifier (PA) that maintains its operating conditions even when the output capacitance of the transistor is greater the optimum capacitance. The finite inductor in the parallel topology is replaced by an L-C T-shaped circuit to eliminate the limits on the maximum operating frequency. The L-C T-shaped circuit can be approximately transformed to the distributed for the microwave applications. The analysis is validated by simulation and measurement. The fabricated PA deliver a maximum drain efficiency of 77.5% with the maximum output power of 40.2 dBm at 2.9 GHz.
In this paper, we propose a high performance matrix inversion implementation on a reconfigurable application specific processor. Our implementation can accelerate variable order matrix inversion ranging from 4 to 144. We adopt LU decomposition to reduce the computation complexity and a pivoting operation to ensure the stability. In order to get higher performance within the limited resources, parallel computing and time-sharing multiplexing are employed. The chip testing results show that our implementation improve the performance of inversion efficiently. The highest parallel speed-up ratio can achieve 3 times, and the execution time of a 144 × 144 matrix inversion is 4.07 ms.
The polarization angle-independent, dual-band, 90° polarization rotator presented in this paper consisted of a bilayered chiral metamaterial composed of twisted capacity-loaded I-shaped electric field-coupled resonators in C4 symmetry. Simulated and measured results consistently demonstrated that the rotator exhibited extremely low loss and high polarization ratio under dual-band conditions. We also systematically investigated the dependence of the electromagnetic response of the loaded structure on the geometric parameters. The proposed simple, easily fabricated model of a chiral metamaterial may be used in further polarization rotator applications.
This letter presents a CMOS energy detector for a non-coherent ultra-wideband receiver. The proposed complementary squarer generates differential output using the NMOS and PMOS differential cascode stage with a common-mode feedback (CMFB) circuit. The squarer achieves high gain without DC offset using complementary squarer based on symmetrical NMOS and PMOS transistor pairs with very low power consumption. The proposed squarer with the integrator is designed using the 0.11-µm CMOS technology. The designed squarer with integrator operates at 3–5 GHz and only dissipate 1 mW at a supply voltage of 1.2 V.
The impact of electroforming polarity on solid Pt/TiO2/Pt memristor is studied. We observe the negative electroforming leads to small and concentrated forming voltages; while positive electroforming leads to the relatively larger and dispersed forming voltages. These phenomena are interpreted by employing a modified bipolar percolation model. We argue the distribution of polarity-related forming voltage is attributed to the different filament growth patterns under the different electroforming polarities. This work facilitates understanding the electroforming procedure and then benefits fabrication for reliable devices with controllable electroforming behaviour.