IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Volume 5 , Issue 12
Showing 1-5 articles out of 5 articles from the selected issue
LETTER
  • Morteza Damavandpeyma, Rasoul Yousefi, Behjat Forouzandeh
    2008 Volume 5 Issue 12 Pages 437-441
    Published: 2008
    Released: June 25, 2008
    JOURNALS FREE ACCESS
    Partially depleted silicon-on-insulator (PD-SOI) technology is an appropriate fabrication process for high-performance/low-power VLSI designs. SOI provides circuits with smaller delay and dynamic power consumption. However performance enhances come along with increase in complexity of performance measurement and delay testing. Whereas the SOI transistors are faster than the bulks, there exists variation in delay caused by threshold voltage shifts that must be considered during the manufacturing test. This paper presents new scan elements to overcome difficulty of delay testing in PD-SOI circuits that its silicon area is comparable to other solutions.
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  • Yuichiro Ikuma, Toshiharu Saiki, Hiroyuki Tsuda
    2008 Volume 5 Issue 12 Pages 442-445
    Published: 2008
    Released: June 25, 2008
    JOURNALS FREE ACCESS
    A small and fast self-holding 2 × 2 optical switch using phase change material is proposed. This switch is based on a directional coupler in which a short waveguide made of a phase-change material (PCM) is sandwiched between two Si waveguides. The characteristics of the proposed switch were simulated by a beam propagation method (BPM). This switch can be as small as 3µm × 21µm because the change in the refractive index of PCMs between the crystalline and amorphous states is very large; in addition, by utilizing the self-holding characteristics, it has the potential for low power consumption. The loss and the crosstalk were calculated to be 2.5dB and -20.4dB in the bar state and 1.3dB and -14.3dB in the cross state, respectively.
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  • Sang Joon Hwang, Young Hyun Jun, Man Young Sung
    2008 Volume 5 Issue 12 Pages 446-450
    Published: 2008
    Released: June 25, 2008
    JOURNALS FREE ACCESS
    The keys to good signal integrity in a Graphic DDR3 (GDDR3) SDRAM interface for a bandwidth up to 1.4Gbps/pin are the minimization of input/output pin capacitance and the accurate control of the output data skew. The proposed pre-emphasis output buffer control scheme provides output data skew minimization without an increase of input/output pin capacitance. Compared to the conventional scheme, the output data aperture window of proposed scheme has increased by 18% and the data output skew has decreased by 48%.
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  • Akihiro Imamura, Naoto Kitabayashi, Fumio Koyama
    2008 Volume 5 Issue 12 Pages 451-456
    Published: 2008
    Released: June 25, 2008
    JOURNALS FREE ACCESS
    A tapered hollow waveguide multiplexer is proposed to combine the output of a GaInAs/GaAs multi-wavelength VCSEL array for coupling into a multi-mode fiber. The design of the proposed hollow waveguide is presented based on ray optics. We demonstrate multiplexing of 4-channel output of a GaInAs/GaAs VCSEL array formed on a patterned substrate for coupling into a multi-mode fiber. The proposed hollow waveguide multiplexer is useful for realizing compact and low-cost WDM transceiver with a multi-wavelength VCSEL array for high capacity short reach optical networks.
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  • Jun Wang, Toru Ido, Toshimasa Matsuoka, Kenji Taniguchi
    2008 Volume 5 Issue 12 Pages 457-463
    Published: 2008
    Released: June 25, 2008
    JOURNALS FREE ACCESS
    A novel approach is proposed to implement summing function for feedforward Δ-Σ modulator. Unlike the conventional methods, neither summing op-amp nor a large number of summing capacitors are used in our design. The high-accuracy summing function is accomplished by using a few capacitors with small size to compensate the summing error caused by parasitic capacitance, thereby resulting in a smaller chip area and no additional power dissipation.
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