A highly-selective, closely-spaced, tri-band bandpass three-dimensional frequency selective surface (3D FSS) is proposed based on the topology of the microwave filter in this paper. The unit cell of the proposed 3D FSS is constructed by combining an air-filled square waveguide and a cuboid dielectric resonator. Both top and bottom layers of the dielectric resonator consist of double square loops, while the middle layer contains an embedded square loop. Due to its inner electromagnetic coupling in the unit cell, multiple transmission zeros/poles are introduced for obtaining high frequency selectivity, two second-order passbands, and wide out-of-band rejection. Concentric square loops with very close sizes are designed to realize small band ratios. In order to understand the working principle of the proposed 3D FSS, the surface current distributions at the frequencies of transmission poles are analyzed. Finally, an FSS prototype is fabricated and measured. The measurement results show a stable response under the incident angles up to 60° for both TE and TM polarizations is realized. Besides, the proposed 3D FSS has a relatively compact unit cell size.
This paper describes design and analysis of monolithic triple-stacked power amplifiers (PAs) in 2-μm / 0.5-μm GaAs HBT-HEMT process. The proposed PAs are designed using both heterojunction bipolar transistor (HBT) and high electron-mobility transistor (HEMT). Based on a common-emitter (CE) configuration of HBT with stacked common-gate (CG) configuration of HEMTs or stacked common-base (CB) configuration of HBT as the third-stacked transistor, better power performances with good PAEs can be achieved as compared with the CE or common-source (CS) amplifier due to high output stacking impedance. The bandwidth with HEMT/CG configuration as the third-stacked transistor is investigated. The proposed stacked PAs demonstrate a maximum output powers of 31.7dBm, a compact chip size of within 1.6×1mm2, and a maximum power added efficiency (PAE) of 38.3% at 5GHz.
A highly efficient CMOS rectifier for RF energy harvesting has been developed (using 0.18-µm CMOS technology). To operate with high efficiency even under extremely low input power conditions, the voltage-doubler-based rectifier was implemented using an effective combination of self-Vth-cancellation (SVC) and photovoltaic (PV)-assisted techniques. In this rectifier, the threshold voltage (Vth) of the diode-connected MOSFET was compensated for by a DC bias voltage generated from not only the on-chip PV cells, but also from the output voltage of the rectifier itself. Therefore, the rectifier operated with high efficiency even under low input power conditions. Furthermore, a bias voltage limiter using simple pn diodes was adopted to regulate the excessive Vth compensation effectively and realize a high efficiency in the operation of the rectifier over a wide power range. The radio frequency to DC power conversion efficiency (PCE) of 30.8% was achieved at an input power level of -15 dBm, a frequency of 1 GHz, an output load resistance of 10 kΩ, and a light irradiance of 10 mW/m2.
A novel angle selective photodetector with gold surface plasmon (SP) antenna on a silicon-on-insulator (SOI) photodiode (PD) is proposed to capture the direction of the incident light. Two types of SP antenna, namely one-dimensional line-and-space grating and two-dimensional hole array grating, are reported. The SP antenna efficiently couples the incident light with the waveguide modes in the SOI PD at specific incident angles. The analytical modelling based on the phase matching between the diffracted light from the SP antenna and the propagating light in the SOI predicts the angle selective behavior of the device. The simulation by finite difference time domain (FDTD) method and measurement have successfully confirmed the prediction. These characteristics to detect the light at different incident angles could be useful in emerging applications such as lensless imaging.
A new method based on adaptive series/parallel conversion to realize linear current output in a wide operating voltage range is presented in this paper. According to the load state, a switch array is employed to perform adaptive series/parallel conversion control on load segments and corresponding constant current branches to ensure constant current in each load segment and constant power of the total load in wide operating voltage range. The proposed design combines the advantages of switch mode current source and linear constant current source. The correctness and feasibility of the proposed method are verified by experiments of a LED driver.
In this paper, a novel broadband transmitarray (TA) design based on one-bit digital coding. The double-layer transmitarray element is composed of a notched square ring patches which is etched the upper layer of the dielectric substrate, and the lower layer is the same metal slit having the same shape as the notched square ring patch, but the notch direction is rotated by 180°. By changing the physical dimensions of the notched square ring element, a phase coverage of about 360° can be achieved. To realize the coding transmitarray, the phase compensation is fuzzified. Two kinds of elements with 0 and π phase responses to represent “0” and “1” elements for 1-bit digital coding are introduced. Theoretical rules of phase compensation fuzzified and a broadband transmitarray antenna are designed by coding unit cell. We design, manufacture and measure a digital coding transmitarray antenna by using the proposed element. The measured results show that the transmitarray has the 1-dB gain bandwidth of 25% (8.4 GHz - 10.8 GHz). The proposed digital coding transmitarray antenna has a wide gain bandwidth. The measured results agree with the simulated results well, which verifies the feasibility and correctness of the proposed structure.